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Allow full build on android:
* rename si_status to si_status_val in n64 as si_status is a preprocessor macro on Android * rename PAGE_MASK to page_mask in samcoupe to avoid clash with macro (it's a local anyway) * abuse namespaces to get around the conflict between our x86emit::REG_Rn and Android's ::REG_Rn in DRC
This commit is contained in:
parent
c1a8703c58
commit
59f15d6819
6 changed files with 48 additions and 29 deletions
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@ -26,10 +26,10 @@ notify:
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port: $$IRC_PORT
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password: $$IRC_PASS
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tls: true
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when:
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success: false
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failure: true
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change: true
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when:
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success: false
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failure: true
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change: true
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# Need to regen secrets file (.drone.sec) from within tea-ci.org to enable
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#notify:
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@ -173,9 +173,21 @@
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#include "drcuml.h"
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#include "drcbex64.h"
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// This is a trick to make it build on Android where the ARM SDK declares ::REG_Rn
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namespace drc {
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using namespace uml;
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using namespace x64emit;
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using x64emit::REG_R8;
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using x64emit::REG_R9;
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using x64emit::REG_R10;
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using x64emit::REG_R11;
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using x64emit::REG_R12;
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using x64emit::REG_R13;
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using x64emit::REG_R14;
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using x64emit::REG_R15;
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//**************************************************************************
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@ -6935,3 +6947,5 @@ void drcbe_x64::op_icopyf(x86code *&dst, const instruction &inst)
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}
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}
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}
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} // namespace drc
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@ -10,8 +10,8 @@
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#pragma once
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#ifndef __DRCBEX64_H__
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#define __DRCBEX64_H__
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#ifndef MAME_DEVICES_CPU_DRCBEX64_H
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#define MAME_DEVICES_CPU_DRCBEX64_H
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#include "drcuml.h"
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#include "drcbeut.h"
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@ -21,6 +21,7 @@
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#include "x86emit.h"
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namespace drc {
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//**************************************************************************
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// TYPE DEFINITIONS
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@ -344,5 +345,9 @@ private:
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static opcode_generate_func s_opcode_table[uml::OP_MAX];
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};
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} // namespace drc
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#endif /* __DRCBEC_H__ */
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using drc::drcbe_x64;
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#endif /* MAME_DEVICES_CPU_DRCBEX64_H */
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@ -283,7 +283,7 @@ private:
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UINT32 si_pif_addr;
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UINT32 si_pif_addr_rd64b;
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UINT32 si_pif_addr_wr64b;
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UINT32 si_status;
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UINT32 si_status_val;
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UINT32 si_dma_dir;
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UINT32 cic_status;
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int cic_type;
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@ -211,7 +211,7 @@ void n64_periphs::device_reset()
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memset(pif_cmd, 0, sizeof(pif_cmd));
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si_dram_addr = 0;
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si_pif_addr = 0;
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si_status = 0;
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si_status_val = 0;
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si_dma_dir = 0;
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si_dma_timer->adjust(attotime::never);
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@ -2084,8 +2084,8 @@ void n64_periphs::si_dma_tick()
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{
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si_dma_timer->adjust(attotime::never);
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pif_dma(si_dma_dir);
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si_status = 0;
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si_status |= 0x1000;
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si_status_val = 0;
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si_status_val |= 0x1000;
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signal_rcp_interrupt(SI_INTERRUPT);
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}
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@ -2139,7 +2139,7 @@ READ32_MEMBER( n64_periphs::si_reg_r )
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//return si_dram_addr;
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case 0x18/4: // SI_STATUS_REG
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ret = si_status;
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ret = si_status_val;
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}
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return ret;
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@ -2155,23 +2155,23 @@ WRITE32_MEMBER( n64_periphs::si_reg_w )
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case 0x04/4: // SI_PIF_ADDR_RD64B_REG
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// PIF RAM -> RDRAM
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if(si_status & 1)
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if(si_status_val & 1)
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{
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si_status |= 8; //DMA Error, overlapping request
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si_status_val |= 8; //DMA Error, overlapping request
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return; // SI Busy, ignore request
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}
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si_pif_addr = data;
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si_pif_addr_rd64b = data;
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si_dma_dir = 0;
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si_status |= 1;
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si_status_val |= 1;
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si_dma_timer->adjust(attotime::from_hz(50000));
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break;
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case 0x10/4: // SI_PIF_ADDR_WR64B_REG
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// RDRAM -> PIF RAM
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if(si_status & 1)
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if(si_status_val & 1)
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{
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si_status |= 8; //DMA Error, overlapping request
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si_status_val |= 8; //DMA Error, overlapping request
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return; // SI Busy, ignore request
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}
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si_pif_addr = data;
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@ -2181,7 +2181,7 @@ WRITE32_MEMBER( n64_periphs::si_reg_w )
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break;
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case 0x18/4: // SI_STATUS_REG
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si_status = 0;
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si_status_val = 0;
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si_dma_timer->adjust(attotime::never);
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clear_rcp_interrupt(SI_INTERRUPT);
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break;
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@ -133,7 +133,7 @@ void samcoupe_state::samcoupe_install_ext_mem(address_space &space)
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void samcoupe_state::samcoupe_update_memory(address_space &space)
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{
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const int PAGE_MASK = ((m_ram->size() & 0xfffff) / 0x4000) - 1;
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const int page_mask = ((m_ram->size() & 0xfffff) / 0x4000) - 1;
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UINT8 *rom = m_region_maincpu->base();
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UINT8 *memory;
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int is_readonly;
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@ -141,8 +141,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
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/* BANK1 */
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if (m_lmpr & LMPR_RAM0) /* Is ram paged in at bank 1 */
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{
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if ((m_lmpr & 0x1F) <= PAGE_MASK)
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memory = &m_ram->pointer()[(m_lmpr & PAGE_MASK) * 0x4000];
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if ((m_lmpr & 0x1F) <= page_mask)
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memory = &m_ram->pointer()[(m_lmpr & page_mask) * 0x4000];
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else
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memory = nullptr; /* Attempt to page in non existant ram region */
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is_readonly = FALSE;
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@ -156,8 +156,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
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/* BANK2 */
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if (((m_lmpr + 1) & 0x1f) <= PAGE_MASK)
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memory = &m_ram->pointer()[((m_lmpr + 1) & PAGE_MASK) * 0x4000];
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if (((m_lmpr + 1) & 0x1f) <= page_mask)
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memory = &m_ram->pointer()[((m_lmpr + 1) & page_mask) * 0x4000];
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else
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memory = nullptr; /* Attempt to page in non existant ram region */
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samcoupe_update_bank(space, 2, memory, FALSE);
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@ -170,8 +170,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
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else
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{
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/* BANK3 */
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if ((m_hmpr & 0x1F) <= PAGE_MASK )
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memory = &m_ram->pointer()[(m_hmpr & PAGE_MASK)*0x4000];
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if ((m_hmpr & 0x1F) <= page_mask )
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memory = &m_ram->pointer()[(m_hmpr & page_mask)*0x4000];
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else
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memory = nullptr; /* Attempt to page in non existant ram region */
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samcoupe_update_bank(space, 3, memory, FALSE);
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@ -185,8 +185,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
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}
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else
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{
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if (((m_hmpr + 1) & 0x1f) <= PAGE_MASK)
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memory = &m_ram->pointer()[((m_hmpr + 1) & PAGE_MASK) * 0x4000];
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if (((m_hmpr + 1) & 0x1f) <= page_mask)
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memory = &m_ram->pointer()[((m_hmpr + 1) & page_mask) * 0x4000];
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else
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memory = nullptr; /* Attempt to page in non existant ram region */
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is_readonly = FALSE;
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@ -196,9 +196,9 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
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/* video memory location */
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if (m_vmpr & 0x40) /* if bit set in 2 bank screen mode */
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m_videoram = &m_ram->pointer()[((m_vmpr & 0x1e) & PAGE_MASK) * 0x4000];
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m_videoram = &m_ram->pointer()[((m_vmpr & 0x1e) & page_mask) * 0x4000];
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else
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m_videoram = &m_ram->pointer()[((m_vmpr & 0x1f) & PAGE_MASK) * 0x4000];
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m_videoram = &m_ram->pointer()[((m_vmpr & 0x1f) & page_mask) * 0x4000];
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}
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