Allow full build on android:

* rename si_status to si_status_val in n64 as si_status is a preprocessor macro on Android
* rename PAGE_MASK to page_mask in samcoupe to avoid clash with macro (it's a local anyway)
* abuse namespaces to get around the conflict between our x86emit::REG_Rn and Android's ::REG_Rn in DRC
This commit is contained in:
Vas Crabb 2016-05-31 17:24:15 +10:00
parent c1a8703c58
commit 59f15d6819
6 changed files with 48 additions and 29 deletions

View file

@ -26,10 +26,10 @@ notify:
port: $$IRC_PORT
password: $$IRC_PASS
tls: true
when:
success: false
failure: true
change: true
when:
success: false
failure: true
change: true
# Need to regen secrets file (.drone.sec) from within tea-ci.org to enable
#notify:

View file

@ -173,9 +173,21 @@
#include "drcuml.h"
#include "drcbex64.h"
// This is a trick to make it build on Android where the ARM SDK declares ::REG_Rn
namespace drc {
using namespace uml;
using namespace x64emit;
using x64emit::REG_R8;
using x64emit::REG_R9;
using x64emit::REG_R10;
using x64emit::REG_R11;
using x64emit::REG_R12;
using x64emit::REG_R13;
using x64emit::REG_R14;
using x64emit::REG_R15;
//**************************************************************************
@ -6935,3 +6947,5 @@ void drcbe_x64::op_icopyf(x86code *&dst, const instruction &inst)
}
}
}
} // namespace drc

View file

@ -10,8 +10,8 @@
#pragma once
#ifndef __DRCBEX64_H__
#define __DRCBEX64_H__
#ifndef MAME_DEVICES_CPU_DRCBEX64_H
#define MAME_DEVICES_CPU_DRCBEX64_H
#include "drcuml.h"
#include "drcbeut.h"
@ -21,6 +21,7 @@
#include "x86emit.h"
namespace drc {
//**************************************************************************
// TYPE DEFINITIONS
@ -344,5 +345,9 @@ private:
static opcode_generate_func s_opcode_table[uml::OP_MAX];
};
} // namespace drc
#endif /* __DRCBEC_H__ */
using drc::drcbe_x64;
#endif /* MAME_DEVICES_CPU_DRCBEX64_H */

View file

@ -283,7 +283,7 @@ private:
UINT32 si_pif_addr;
UINT32 si_pif_addr_rd64b;
UINT32 si_pif_addr_wr64b;
UINT32 si_status;
UINT32 si_status_val;
UINT32 si_dma_dir;
UINT32 cic_status;
int cic_type;

View file

@ -211,7 +211,7 @@ void n64_periphs::device_reset()
memset(pif_cmd, 0, sizeof(pif_cmd));
si_dram_addr = 0;
si_pif_addr = 0;
si_status = 0;
si_status_val = 0;
si_dma_dir = 0;
si_dma_timer->adjust(attotime::never);
@ -2084,8 +2084,8 @@ void n64_periphs::si_dma_tick()
{
si_dma_timer->adjust(attotime::never);
pif_dma(si_dma_dir);
si_status = 0;
si_status |= 0x1000;
si_status_val = 0;
si_status_val |= 0x1000;
signal_rcp_interrupt(SI_INTERRUPT);
}
@ -2139,7 +2139,7 @@ READ32_MEMBER( n64_periphs::si_reg_r )
//return si_dram_addr;
case 0x18/4: // SI_STATUS_REG
ret = si_status;
ret = si_status_val;
}
return ret;
@ -2155,23 +2155,23 @@ WRITE32_MEMBER( n64_periphs::si_reg_w )
case 0x04/4: // SI_PIF_ADDR_RD64B_REG
// PIF RAM -> RDRAM
if(si_status & 1)
if(si_status_val & 1)
{
si_status |= 8; //DMA Error, overlapping request
si_status_val |= 8; //DMA Error, overlapping request
return; // SI Busy, ignore request
}
si_pif_addr = data;
si_pif_addr_rd64b = data;
si_dma_dir = 0;
si_status |= 1;
si_status_val |= 1;
si_dma_timer->adjust(attotime::from_hz(50000));
break;
case 0x10/4: // SI_PIF_ADDR_WR64B_REG
// RDRAM -> PIF RAM
if(si_status & 1)
if(si_status_val & 1)
{
si_status |= 8; //DMA Error, overlapping request
si_status_val |= 8; //DMA Error, overlapping request
return; // SI Busy, ignore request
}
si_pif_addr = data;
@ -2181,7 +2181,7 @@ WRITE32_MEMBER( n64_periphs::si_reg_w )
break;
case 0x18/4: // SI_STATUS_REG
si_status = 0;
si_status_val = 0;
si_dma_timer->adjust(attotime::never);
clear_rcp_interrupt(SI_INTERRUPT);
break;

View file

@ -133,7 +133,7 @@ void samcoupe_state::samcoupe_install_ext_mem(address_space &space)
void samcoupe_state::samcoupe_update_memory(address_space &space)
{
const int PAGE_MASK = ((m_ram->size() & 0xfffff) / 0x4000) - 1;
const int page_mask = ((m_ram->size() & 0xfffff) / 0x4000) - 1;
UINT8 *rom = m_region_maincpu->base();
UINT8 *memory;
int is_readonly;
@ -141,8 +141,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
/* BANK1 */
if (m_lmpr & LMPR_RAM0) /* Is ram paged in at bank 1 */
{
if ((m_lmpr & 0x1F) <= PAGE_MASK)
memory = &m_ram->pointer()[(m_lmpr & PAGE_MASK) * 0x4000];
if ((m_lmpr & 0x1F) <= page_mask)
memory = &m_ram->pointer()[(m_lmpr & page_mask) * 0x4000];
else
memory = nullptr; /* Attempt to page in non existant ram region */
is_readonly = FALSE;
@ -156,8 +156,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
/* BANK2 */
if (((m_lmpr + 1) & 0x1f) <= PAGE_MASK)
memory = &m_ram->pointer()[((m_lmpr + 1) & PAGE_MASK) * 0x4000];
if (((m_lmpr + 1) & 0x1f) <= page_mask)
memory = &m_ram->pointer()[((m_lmpr + 1) & page_mask) * 0x4000];
else
memory = nullptr; /* Attempt to page in non existant ram region */
samcoupe_update_bank(space, 2, memory, FALSE);
@ -170,8 +170,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
else
{
/* BANK3 */
if ((m_hmpr & 0x1F) <= PAGE_MASK )
memory = &m_ram->pointer()[(m_hmpr & PAGE_MASK)*0x4000];
if ((m_hmpr & 0x1F) <= page_mask )
memory = &m_ram->pointer()[(m_hmpr & page_mask)*0x4000];
else
memory = nullptr; /* Attempt to page in non existant ram region */
samcoupe_update_bank(space, 3, memory, FALSE);
@ -185,8 +185,8 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
}
else
{
if (((m_hmpr + 1) & 0x1f) <= PAGE_MASK)
memory = &m_ram->pointer()[((m_hmpr + 1) & PAGE_MASK) * 0x4000];
if (((m_hmpr + 1) & 0x1f) <= page_mask)
memory = &m_ram->pointer()[((m_hmpr + 1) & page_mask) * 0x4000];
else
memory = nullptr; /* Attempt to page in non existant ram region */
is_readonly = FALSE;
@ -196,9 +196,9 @@ void samcoupe_state::samcoupe_update_memory(address_space &space)
/* video memory location */
if (m_vmpr & 0x40) /* if bit set in 2 bank screen mode */
m_videoram = &m_ram->pointer()[((m_vmpr & 0x1e) & PAGE_MASK) * 0x4000];
m_videoram = &m_ram->pointer()[((m_vmpr & 0x1e) & page_mask) * 0x4000];
else
m_videoram = &m_ram->pointer()[((m_vmpr & 0x1f) & PAGE_MASK) * 0x4000];
m_videoram = &m_ram->pointer()[((m_vmpr & 0x1f) & page_mask) * 0x4000];
}