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video/pc_vga_matrox.cpp: implement RAMDAC extended indexed mechanism, add basic SVGA mode switcher
This commit is contained in:
angelosa
parent
8368a3da29
commit
449f468204
2 changed files with 198 additions and 27 deletions
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@ -13,12 +13,15 @@ matrox_vga_device::matrox_vga_device(const machine_config &mconfig, const char *
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// 3 bits of address space?
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m_crtcext_space_config = address_space_config("crtcext_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(matrox_vga_device::crtcext_map), this));
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// TODO: docs mentions using 0x22 / 0x24 / 0x26 for regular CRTC (coming from plain VGA?)
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m_ramdac_indexed_space_config = address_space_config("ramdac_indexed_regs", ENDIANNESS_LITTLE, 8, 8, 0, address_map_constructor(FUNC(matrox_vga_device::ramdac_indexed_map), this));
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}
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device_memory_interface::space_config_vector matrox_vga_device::memory_space_config() const
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{
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auto r = svga_device::memory_space_config();
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r.emplace_back(std::make_pair(EXT_REG, &m_crtcext_space_config));
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r.emplace_back(std::make_pair(EXT_REG, &m_crtcext_space_config));
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r.emplace_back(std::make_pair(EXT_REG + 1, &m_ramdac_indexed_space_config));
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return r;
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}
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@ -27,6 +30,10 @@ void matrox_vga_device::device_reset()
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svga_device::device_reset();
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m_crtcext_index = 0;
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m_crtcext_misc = 0;
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m_mgamode = false;
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m_truecolor_ctrl = 0x80;
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m_multiplex_ctrl = 0x98;
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}
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void matrox_vga_device::io_3bx_3dx_map(address_map &map)
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@ -56,7 +63,7 @@ void matrox_vga_device::crtcext_map(address_map &map)
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// map(0x00, 0x00) Address Generator Extensions
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// map(0x01, 0x01) Horizontal Counter Extensions
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// map(0x02, 0x02) Vertical Counter Extensions
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// map(0x03, 0x03) Miscellaneous
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map(0x03, 0x03).rw(FUNC(matrox_vga_device::crtcext3_misc_r), FUNC(matrox_vga_device::crtcext3_misc_w));
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// CRTCEXT4 Memory Page register
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map(0x04, 0x04).lrw8(
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NAME([this] (offs_t offset) { return svga.bank_w & 0x7f; }),
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@ -68,53 +75,198 @@ void matrox_vga_device::crtcext_map(address_map &map)
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// seems to disable SVGA drawing -> diagnostic check?
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}
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/*
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* CRTCEXT3 Miscellaneous
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*
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* x--- ---- MGA mode (SVGA and accelerated modes)
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* -x-- ---- CSYNCEN
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* --x- ---- SLOW256 disables HW acceleration if '1' for VGA mode 13h
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* ---x x--- VIDDELAY delay for CRTC signals, depends on RAM configuration
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* ---0 0--- 4MB board
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* ---0 1--- 2MB board
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* ---1 x--- 8MB board
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* ---- -xxx SCALE dot clock scaling factor
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* ---- -000 /1
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* ---- -001 /2
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* ---- -010 /3
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* ---- -011 /4
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* ---- -100 <reserved>
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* ---- -101 /6
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* ---- -110 <reserved>
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* ---- -111 /8
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*/
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u8 matrox_vga_device::crtcext3_misc_r()
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{
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return m_crtcext_misc;
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}
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void matrox_vga_device::crtcext3_misc_w(offs_t offset, u8 data)
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{
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logerror("CRTCEXT3: %02x\n", data);
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m_crtcext_misc = data;
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m_mgamode = bool(BIT(data, 7));
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}
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// RAMDAC
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// - paired with a Texas Instruments TVP3026 here -> a superset of INMOS IMSG176/IMSG178
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// - integrated with a superset in G400 at least
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void matrox_vga_device::ramdac_ext_map(address_map &map)
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{
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// map(0x00, 0x00).rw(FUNC(matrox_vga_device::ramdac_write_index_r), FUNC(matrox_vga_device::ramdac_write_index_w));
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// map(0x01, 0x01).rw(FUNC(matrox_vga_device::ramdac_data_r), FUNC(matrox_vga_device::ramdac_data_w));
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// map(0x02, 0x02).rw(FUNC(matrox_vga_device::ramdac_mask_r), FUNC(matrox_vga_device::ramdac_mask_w));
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// map(0x03, 0x03).rw(FUNC(matrox_vga_device::ramdac_read_index_r), FUNC(matrox_vga_device::ramdac_read_index_w));
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// map(0x04, 0x04) Cursor/Overscan Color Write Index
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// map(0x05, 0x05) Cursor/Overscan Color data
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// map(0x07, 0x07) Cursor/Overscan Color Read Index
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// map(0x09, 0x09) Direct Cursor control
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// map(0x00, 0x00).rw(FUNC(matrox_vga_device::ramdac_write_index_r), FUNC(matrox_vga_device::ramdac_write_index_w));
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// map(0x01, 0x01).rw(FUNC(matrox_vga_device::ramdac_data_r), FUNC(matrox_vga_device::ramdac_data_w));
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// map(0x02, 0x02).rw(FUNC(matrox_vga_device::ramdac_mask_r), FUNC(matrox_vga_device::ramdac_mask_w));
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// map(0x03, 0x03).rw(FUNC(matrox_vga_device::ramdac_read_index_r), FUNC(matrox_vga_device::ramdac_read_index_w));
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// map(0x04, 0x04) Cursor/Overscan Color Write Index
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// map(0x05, 0x05) Cursor/Overscan Color data
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// map(0x07, 0x07) Cursor/Overscan Color Read Index
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// map(0x09, 0x09) Direct Cursor control
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map(0x0a, 0x0a).rw(FUNC(matrox_vga_device::ramdac_ext_indexed_r), FUNC(matrox_vga_device::ramdac_ext_indexed_w));
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// map(0x0b, 0x0b) Cursor RAM data
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// map(0x0c, 0x0f) Cursor X/Y positions
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// map(0x10, 0x1f) <reserved>
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// map(0x0b, 0x0b) Cursor RAM data
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// map(0x0c, 0x0f) Cursor X/Y positions
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// map(0x10, 0x1f) <reserved>
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}
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u8 matrox_vga_device::ramdac_ext_indexed_r()
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{
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// Unclear from the docs, according to usage seems to be the write index with no autoincrement
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logerror("RAMDAC ext read [%02x]++\n", vga.dac.write_index);
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return m_ramdac_mode;
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logerror("RAMDAC ext read [%02x]\n", vga.dac.write_index);
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return space(EXT_REG + 1).read_byte(vga.dac.write_index);
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;
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}
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void matrox_vga_device::ramdac_ext_indexed_w(offs_t offset, u8 data)
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{
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// TODO: really uses the palette write index, cheating for now
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m_ramdac_mode = data;
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logerror("RAMDAC ext [%02x]++ %02x\n", vga.dac.write_index, data);
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if (!machine().side_effects_disabled())
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vga.dac.write_index ++;
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svga.rgb16_en = (data & 0xf8) == 0xf0;
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logerror("RAMDAC ext [%02x] %02x\n", vga.dac.write_index, data);
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space(EXT_REG + 1).write_byte(vga.dac.write_index, data);
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}
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void matrox_vga_device::ramdac_indexed_map(address_map &map)
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{
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map(0x18, 0x18).rw(FUNC(matrox_vga_device::truecolor_ctrl_r), FUNC(matrox_vga_device::truecolor_ctrl_w));
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map(0x19, 0x19).rw(FUNC(matrox_vga_device::multiplex_ctrl_r), FUNC(matrox_vga_device::multiplex_ctrl_w));
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}
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u8 matrox_vga_device::truecolor_ctrl_r()
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{
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return m_truecolor_ctrl;
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}
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void matrox_vga_device::truecolor_ctrl_w(offs_t offset, u8 data)
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{
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m_truecolor_ctrl = data;
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flush_true_color_mode();
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}
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u8 matrox_vga_device::multiplex_ctrl_r()
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{
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return m_multiplex_ctrl;
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}
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void matrox_vga_device::multiplex_ctrl_w(offs_t offset, u8 data)
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{
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m_multiplex_ctrl = data;
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flush_true_color_mode();
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}
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void matrox_vga_device::flush_true_color_mode()
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{
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logerror("New video mode %02x %02x\n", m_truecolor_ctrl, m_multiplex_ctrl);
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svga.rgb8_en = svga.rgb15_en = svga.rgb16_en = svga.rgb24_en = svga.rgb32_en = 0;
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if (m_truecolor_ctrl == 0x80 && m_multiplex_ctrl == 0x98)
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{
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logerror("\tVGA mode\n");
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return;
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}
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switch(m_truecolor_ctrl)
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{
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case 0x80:
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if (m_multiplex_ctrl >= 0x49 && m_multiplex_ctrl <= 0x4c)
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{
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logerror("\tSVGA 8-bit mode\n");
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svga.rgb8_en = 1;
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}
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else
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{
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// [0x41, 0x42, 0x43, 0x44] for normal
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// [0x61, 0x62, 0x63, 0x64] for nibble swapped
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popmessage("TVP3026: Unemulated 4-bit %s with multiplex: %02x"
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, m_multiplex_ctrl & 0x20 ? "normal" : "nibble swapped"
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, m_multiplex_ctrl
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);
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}
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break;
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case 0x16:
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case 0x1e:
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case 0x56:
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case 0x5e:
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if (m_multiplex_ctrl == 0x5b || m_multiplex_ctrl == 0x5c)
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{
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logerror("\tRGB 8-8-8 mode\n");
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svga.rgb24_en = 1;
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}
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break;
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case 0x17:
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case 0x1f:
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case 0x57:
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case 0x5f:
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if (m_multiplex_ctrl == 0x5b || m_multiplex_ctrl == 0x5c)
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popmessage("TVP3026: Unemulated BGR 8-8-8 mode");
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break;
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case 0x06:
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case 0x46:
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if (m_multiplex_ctrl == 0x5b || m_multiplex_ctrl == 0x5c)
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{
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logerror("\t%cRGB 8-8-8-8 mode\n", m_truecolor_ctrl & 0x40 ? "X" : "O");
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svga.rgb32_en = 1;
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}
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break;
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case 0x07:
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case 0x47:
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if (m_multiplex_ctrl == 0x5b || m_multiplex_ctrl == 0x5c)
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popmessage("TVP3026: Unemulated BGR%c 8-8-8-8 mode", m_truecolor_ctrl & 0x40 ? "X" : "O");
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break;
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case 0x05:
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case 0x45:
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if (m_multiplex_ctrl >= 0x52 && m_multiplex_ctrl <= 0x54)
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{
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logerror("\tXGA RGB 5-6-5 mode\n");
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svga.rgb16_en = 1;
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}
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break;
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case 0x04:
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case 0x44:
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// 0x04 is selected by VESA 2.4 test, which may be buggy?
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// (extended mode 110h, while above uses 111h)
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if (m_multiplex_ctrl >= 0x52 && m_multiplex_ctrl <= 0x54)
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{
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logerror("\tTarga %cRGB 1-5-5-5 mode\n", m_truecolor_ctrl & 0x40 ? "X" : "O");
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svga.rgb16_en = 1;
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}
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break;
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case 0x03:
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case 0x43:
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if (m_multiplex_ctrl >= 0x52 && m_multiplex_ctrl <= 0x54)
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popmessage("TVP3026: Unemulated RGB 6-6-4 mode");
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break;
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case 0x01:
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case 0x41:
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if (m_multiplex_ctrl >= 0x52 && m_multiplex_ctrl <= 0x54)
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popmessage("TVP3026: Unemulated RGB%c 4-4-4-4 mode", m_truecolor_ctrl & 0x40 ? "X" : "O");
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break;
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}
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}
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uint8_t matrox_vga_device::mem_r(offs_t offset)
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{
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// TODO: MGA mode CRTCEXT3 bit 7
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if (svga.rgb16_en)
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if (m_mgamode)
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return svga_device::mem_linear_r(offset + (svga.bank_w * 0x10000));
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return svga_device::mem_r(offset);
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}
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void matrox_vga_device::mem_w(offs_t offset, uint8_t data)
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{
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if (svga.rgb16_en)
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if (m_mgamode)
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{
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svga_device::mem_linear_w(offset + (svga.bank_w * 0x10000), data);
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return;
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@ -24,17 +24,36 @@ protected:
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virtual void device_reset() override;
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void crtcext_map(address_map &map);
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virtual uint16_t offset() override;
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void crtcext_map(address_map &map);
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void ramdac_indexed_map(address_map &map);
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void flush_true_color_mode();
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private:
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virtual space_config_vector memory_space_config() const override;
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address_space_config m_crtcext_space_config;
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address_space_config m_ramdac_indexed_space_config;
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// CRTC
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u8 crtcext3_misc_r();
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void crtcext3_misc_w(offs_t offset, u8 data);
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u8 m_crtcext_index = 0;
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u8 m_crtcext_misc = 0;
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bool m_mgamode = false;
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// RAMDAC
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u8 ramdac_ext_indexed_r();
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void ramdac_ext_indexed_w(offs_t offset, u8 data);
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u8 m_crtcext_index = 0;
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u8 m_ramdac_mode = 0;
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u8 truecolor_ctrl_r();
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void truecolor_ctrl_w(offs_t offset, u8 data);
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u8 multiplex_ctrl_r();
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void multiplex_ctrl_w(offs_t offset, u8 data);
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u8 m_multiplex_ctrl = 0;
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u8 m_truecolor_ctrl = 0;
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};
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DECLARE_DEVICE_TYPE(MATROX_VGA, matrox_vga_device)
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