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elwro800.cpp: Memory cleanup (nw)
- NMI handler in separate opcode space so "direct handler can trivially go away" (as R. Belmont suggested) - Use address_map_bank_device instead of dynamically splicing RAM and ROM banks into the map
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a841ff553e
commit
41563bd476
1 changed files with 54 additions and 28 deletions
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@ -29,6 +29,7 @@
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/* Devices */
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#include "imagedev/cassette.h"
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#include "formats/tzx_cas.h"
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#include "machine/bankdev.h"
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#include "machine/ram.h"
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@ -40,6 +41,8 @@ public:
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m_i8251(*this, "i8251"),
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m_i8255(*this, "ppi8255"),
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m_centronics(*this, "centronics"),
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m_bank1(*this, "bank1"),
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m_bank2(*this, "bank2"),
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m_io_ports(*this, {"LINE7", "LINE6", "LINE5", "LINE4", "LINE3", "LINE2", "LINE1", "LINE0", "LINE8"}),
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m_io_line9(*this, "LINE9"),
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m_io_network_id(*this, "NETWORK ID")
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@ -52,9 +55,8 @@ public:
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/* NR signal */
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uint8_t m_NR;
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uint8_t m_df_on_databus;
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DECLARE_DIRECT_UPDATE_MEMBER(elwro800_direct_handler);
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DECLARE_READ8_MEMBER(nmi_r);
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DECLARE_WRITE8_MEMBER(elwro800jr_fdc_control_w);
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DECLARE_READ8_MEMBER(elwro800jr_io_r);
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DECLARE_WRITE8_MEMBER(elwro800jr_io_w);
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@ -68,6 +70,8 @@ protected:
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required_device<i8251_device> m_i8251;
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required_device<i8255_device> m_i8255;
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required_device<centronics_device> m_centronics;
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required_device<address_map_bank_device> m_bank1;
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required_device<address_map_bank_device> m_bank2;
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required_ioport_array<9> m_io_ports;
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required_ioport m_io_line9;
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required_ioport m_io_network_id;
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@ -85,14 +89,13 @@ protected:
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* (note that in CP/J mode address 66 is used for FCB)
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*
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*************************************/
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DIRECT_UPDATE_MEMBER(elwro800_state::elwro800_direct_handler)
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READ8_MEMBER(elwro800_state::nmi_r)
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{
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if (m_ram_at_0000 && address == 0x66)
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{
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direct.explicit_configure(0x66, 0x66, 0, &m_df_on_databus);
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return ~0;
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}
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return address;
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if (m_ram_at_0000)
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return 0xdf;
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else
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return m_bank1->read8(space, 0x66);
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}
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/*************************************
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@ -131,35 +134,30 @@ void elwro800_state::elwro800jr_mmu_w(uint8_t data)
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if (!BIT(cs,0))
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{
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// rom BAS0
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membank("bank1")->set_base(memregion("maincpu")->base() + 0x0000); /* BAS0 ROM */
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m_maincpu->space(AS_PROGRAM).nop_write(0x0000, 0x1fff);
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m_bank1->set_bank(1);
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m_ram_at_0000 = 0;
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}
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else if (!BIT(cs,4))
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{
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// rom BOOT
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membank("bank1")->set_base(memregion("maincpu")->base() + 0x4000); /* BOOT ROM */
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m_maincpu->space(AS_PROGRAM).nop_write(0x0000, 0x1fff);
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m_bank1->set_bank(2);
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m_ram_at_0000 = 0;
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}
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else
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{
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// RAM
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membank("bank1")->set_base(messram);
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m_maincpu->space(AS_PROGRAM).install_write_bank(0x0000, 0x1fff, "bank1");
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m_bank1->set_bank(0);
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m_ram_at_0000 = 1;
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}
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cs = prom[((0x2000 >> 10) | (ls175 << 6)) & 0x1ff];
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if (!BIT(cs,1))
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{
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membank("bank2")->set_base(memregion("maincpu")->base() + 0x2000); /* BAS1 ROM */
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m_maincpu->space(AS_PROGRAM).nop_write(0x2000, 0x3fff);
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m_bank2->set_bank(1); // BAS1 ROM
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}
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else
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{
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membank("bank2")->set_base(messram + 0x2000); /* RAM */
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m_maincpu->space(AS_PROGRAM).install_write_bank(0x2000, 0x3fff, "bank2");
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m_bank2->set_bank(0); // RAM
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}
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if (BIT(ls175,2))
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@ -364,16 +362,34 @@ WRITE8_MEMBER(elwro800_state::elwro800jr_io_w)
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*
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*************************************/
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static ADDRESS_MAP_START(elwro800_mem, AS_PROGRAM, 8, elwro800_state )
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AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("bank1")
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AM_RANGE(0x2000, 0x3fff) AM_RAMBANK("bank2")
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AM_RANGE(0x4000, 0xffff) AM_RAMBANK("bank3")
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static ADDRESS_MAP_START(elwro800_mem, AS_PROGRAM, 8, elwro800_state)
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AM_RANGE(0x0000, 0x1fff) AM_DEVICE("bank1", address_map_bank_device, amap8)
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AM_RANGE(0x2000, 0x3fff) AM_DEVICE("bank2", address_map_bank_device, amap8)
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AM_RANGE(0x4000, 0xffff) AM_RAMBANK("rambank3")
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(elwro800_io, AS_IO, 8, elwro800_state )
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static ADDRESS_MAP_START(elwro800_io, AS_IO, 8, elwro800_state)
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AM_RANGE(0x0000, 0xffff) AM_READWRITE(elwro800jr_io_r, elwro800jr_io_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(elwro800_m1, AS_DECRYPTED_OPCODES, 8, elwro800_state)
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AM_RANGE(0x0066, 0x0066) AM_READ(nmi_r)
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AM_RANGE(0x0000, 0x1fff) AM_DEVICE("bank1", address_map_bank_device, amap8)
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AM_RANGE(0x2000, 0x3fff) AM_DEVICE("bank2", address_map_bank_device, amap8)
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AM_RANGE(0x4000, 0xffff) AM_RAMBANK("rambank3")
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(elwro800_bank1, AS_PROGRAM, 8, elwro800_state)
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AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("rambank1")
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AM_RANGE(0x2000, 0x3fff) AM_ROM AM_REGION("maincpu", 0x0000) AM_WRITENOP // BAS0 ROM
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AM_RANGE(0x4000, 0x5fff) AM_ROM AM_REGION("maincpu", 0x4000) AM_WRITENOP // BOOT ROM
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(elwro800_bank2, AS_PROGRAM, 8, elwro800_state)
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AM_RANGE(0x0000, 0x1fff) AM_RAMBANK("rambank2")
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AM_RANGE(0x2000, 0x3fff) AM_ROM AM_REGION("maincpu", 0x2000) AM_WRITENOP // BAS1 ROM
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ADDRESS_MAP_END
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/*************************************
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*
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* Input ports
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@ -496,18 +512,17 @@ MACHINE_RESET_MEMBER(elwro800_state,elwro800)
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{
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uint8_t *messram = m_ram->pointer();
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m_df_on_databus = 0xdf;
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memset(messram, 0, 64*1024);
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membank("bank3")->set_base(messram + 0x4000);
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membank("rambank1")->set_base(messram + 0x0000);
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membank("rambank2")->set_base(messram + 0x2000);
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membank("rambank3")->set_base(messram + 0x4000);
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m_port_7ffd_data = 0;
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m_port_1ffd_data = -1;
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// this is a reset of ls175 in mmu
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elwro800jr_mmu_w(0);
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m_maincpu->space(AS_PROGRAM).set_direct_update_handler(direct_update_delegate(&elwro800_state::elwro800_direct_handler, this));
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}
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INTERRUPT_GEN_MEMBER(elwro800_state::elwro800jr_interrupt)
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@ -544,6 +559,7 @@ static MACHINE_CONFIG_START( elwro800, elwro800_state )
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MCFG_CPU_ADD("maincpu",Z80, 3500000) /* 3.5 MHz */
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MCFG_CPU_PROGRAM_MAP(elwro800_mem)
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MCFG_CPU_IO_MAP(elwro800_io)
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MCFG_CPU_DECRYPTED_OPCODES_MAP(elwro800_m1)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", elwro800_state, elwro800jr_interrupt)
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MCFG_MACHINE_RESET_OVERRIDE(elwro800_state,elwro800)
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@ -600,6 +616,16 @@ static MACHINE_CONFIG_START( elwro800, elwro800_state )
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/* internal ram */
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MCFG_RAM_ADD(RAM_TAG)
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MCFG_RAM_DEFAULT_SIZE("64K")
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MCFG_DEVICE_ADD("bank1", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(elwro800_bank1)
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MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
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MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
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MCFG_DEVICE_ADD("bank2", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(elwro800_bank2)
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MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
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MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
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MACHINE_CONFIG_END
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/*************************************
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