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Jubilee Double-Up Poker (TMS9980) updates... [Roberto Fresca]
- Demuxed the input system. - Hooked an cleaned all inputs, except the coin in (missing). - Added NVRAM support. - Added technical notes.
This commit is contained in:
Roberto Fresca
parent
f7392cdfe6
commit
385c8e48ec
1 changed files with 65 additions and 183 deletions
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@ -132,6 +132,7 @@
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#include "emu.h"
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#include "cpu/tms9900/tms9980a.h"
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#include "video/mc6845.h"
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#include "machine/nvram.h"
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class jubilee_state : public driver_device
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@ -233,7 +234,7 @@ static ADDRESS_MAP_START( jubileep_map, AS_PROGRAM, 8, jubilee_state )
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ADDRESS_MAP_GLOBAL_MASK(0x3fff)
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AM_RANGE(0x0000, 0x2fff) AM_ROM
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AM_RANGE(0x3000, 0x33ff) AM_RAM AM_WRITE(jubileep_videoram_w) AM_SHARE("videoram") /* First half of TC5517AP RAM */
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AM_RANGE(0x3400, 0x37ff) AM_RAM /* Second half of TC5517AP RAM */
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AM_RANGE(0x3400, 0x37ff) AM_RAM AM_SHARE("nvram") /* Second half of TC5517AP RAM */
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AM_RANGE(0x3800, 0x3bff) AM_RAM AM_WRITE(jubileep_colorram_w) AM_SHARE("colorram") /* Whole 2114 RAM (attr for gfx banks 00-03) */
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/* CRTC seems to be mapped here. Read 00-01 and then write on them.
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@ -263,8 +264,14 @@ ADDRESS_MAP_END
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behavior at best.
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*/
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READ8_MEMBER(jubilee_state::unk_r)
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/* bits... -x-- --xx
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| ++-- Credits.
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+--------- Bypass memory start error.
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*/
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{
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return (machine().rand() & 0xff);
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return (machine().rand() & 0x43); // bit0 and bit1 are involved in credits input.
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logerror("CRU read from address %04x\n", offset<<4);
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// return 0;
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}
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@ -286,44 +293,35 @@ WRITE8_MEMBER(jubilee_state::unk_w)
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// Inputs Multiplexion...
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if (((offset<<1)==0x0cc0)&&(data==1))
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{
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mux_sel = 1;
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}
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if (((offset<<1)==0x0cc2)&&(data==1))
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{
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mux_sel = 2;
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mux_sel = 1;
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}
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if (((offset<<1)==0x0cc4)&&(data==1))
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{
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mux_sel = 3;
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mux_sel = 2;
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}
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if (((offset<<1)==0x0cc6)&&(data==1))
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{
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mux_sel = 4;
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mux_sel = 3;
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}
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if (((offset<<1)==0x0ccc)&&(data==1))
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{
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mux_sel = 5;
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}
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// suspicious... just for testing
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if (((offset<<1)==0x0ce0)&&(data==1))
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{
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mux_sel = 1;
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}
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if (((offset<<1)==0x0ce2)&&(data==1))
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{
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mux_sel = 5;
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}
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if (((offset<<1)==0x0ce6)&&(data==1))
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{
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mux_sel = 1;
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}
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// suspicious... just for testing not ce0 ce2 ce6
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// if (((offset<<1)==0x0cc0)&&(data==0))
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// {
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// mux_sel = 6;
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// }
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// if (((offset<<1)==0x0ce2)&&(data==1))
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// {
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// mux_sel = 6;
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// }
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// if (((offset<<1)==0x0ce6)&&(data==1))
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// {
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// mux_sel = 6;
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// }
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}
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READ8_MEMBER(jubilee_state::mux_port_r)
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@ -333,30 +331,30 @@ READ8_MEMBER(jubilee_state::mux_port_r)
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case 0x01: return ioport("IN0")->read();
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case 0x02: return ioport("IN1")->read();
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case 0x03: return ioport("IN2")->read();
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case 0x04: return ioport("IN3")->read();
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case 0x05: return ioport("IN4")->read();
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// case 0x00: return ioport("DSW0")->read();
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}
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return 0xff;
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// return (machine().rand() & 0xff);
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}
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static ADDRESS_MAP_START( jubileep_cru_map, AS_IO, 8, jubilee_state )
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// AM_RANGE(0x0000, 0x01ff) AM_READ(unk_r)
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// AM_RANGE(0x0080, 0x0080) AM_READ(unk_r)
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// AM_RANGE(0x00c8, 0x00c8) AM_READ(unk_r) // use to see the game stuff (even cards)
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// AM_RANGE(0x00c8, 0x00c8) AM_READ_PORT("IN0") // D0 needs to be triggered constantly to advance.
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AM_RANGE(0x00c8, 0x00c8) AM_READ(mux_port_r) // Multiplexed inputs?
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// AM_RANGE(0x00c8, 0x00c8) AM_READ(unk_r) // use to see the game stuff (even cards)
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AM_RANGE(0x00c8, 0x00c8) AM_READ(mux_port_r) // Multiplexed inputs
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AM_RANGE(0x0000, 0x0fff) AM_WRITE(unk_w)
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ADDRESS_MAP_END
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/* I/O byte R/W
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0x080 R ; Input port? polled at begining.
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0x0C8 R ; Input port. If you tie it to a rnd value, you can see the game running at some point.
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0x0C8 R ; Input port. If you tie it to a rnd value, you can see the game running.
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Can't see more inputs. Maybe there is a multiplexion with these possible writes:
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0CC0/0CC2/0CC4/0CC6
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Can't see more inputs. There is a multiplexion with the following offsets as selectors:
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CC2/CC4/CC6
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None of them seems involved in the coin input.
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*/
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@ -365,159 +363,41 @@ ADDRESS_MAP_END
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*************************/
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static INPUT_PORTS_START( jubileep )
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/* Coin In is tied to bits 0 & 1 (together) of port 0xC8.
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Need to find the selector status to implement in some way.
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(if you inject random data masked in port 0xC8, you can see
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credits entering in the game)
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*/
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PORT_START("IN0")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_1) PORT_NAME("IN0-1")
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_2) PORT_NAME("IN0-2")
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_3) PORT_NAME("IN0-3")
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_4) PORT_NAME("IN0-4")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_5) PORT_NAME("IN0-5")
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_6) PORT_NAME("IN0-6")
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_7) PORT_NAME("IN0-7")
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_8) PORT_NAME("IN0-8")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_POKER_CANCEL ) PORT_NAME("Cancel / Take") // cancel / take
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_GAMBLE_BET ) PORT_NAME("Bet / Gamble") // bet / gamble
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_POKER_HOLD4 ) PORT_NAME("Hold 4 / Half Gamble") // hold 4 / half gamble
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_POKER_HOLD5 ) PORT_NAME("Hold 5 / Red") // hold 5 / red
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_CODE(KEYCODE_8) PORT_NAME("Attendant Hand Pay")
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_POKER_HOLD1 ) PORT_NAME("Hold 1 / Black") // hold 1 / black
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_POKER_HOLD2 ) PORT_NAME("Hold 2") // hold 2
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_POKER_HOLD3 ) PORT_NAME("Hold 3") // hold 3
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PORT_START("IN1")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("IN1-1")
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("IN1-2") // bet
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_E) PORT_NAME("IN1-3")
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_R) PORT_NAME("IN1-4")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_T) PORT_NAME("IN1-5")
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Y) PORT_NAME("IN1-6")
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_U) PORT_NAME("IN1-7")
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_I) PORT_NAME("IN1-8")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Attendant (to pass the memory error and hand pay)") // attendant (to pass the memory error and hand pay)
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Bookkeeping") PORT_TOGGLE // service / bookeeping
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PORT_START("IN2")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("IN2-1")
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("IN2-2")
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("IN2-3")
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_F) PORT_NAME("IN2-4")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_G) PORT_NAME("IN2-5")
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_H) PORT_NAME("IN2-6")
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_J) PORT_NAME("IN2-7") // attandant (to pass the memory error)
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_K) PORT_NAME("IN2-8") // service / bookeeping
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Reset") // reset?
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START1 ) PORT_NAME("Deal/Start") // deal
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
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PORT_START("IN3")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Z) PORT_NAME("IN3-1")
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_X) PORT_NAME("IN3-2")
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_C) PORT_NAME("IN3-3")
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_V) PORT_NAME("IN3-4")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_B) PORT_NAME("IN3-5") // deal
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("IN3-6")
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN3-7")
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN3-8")
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PORT_START("IN4")
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PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("IN4-1")
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PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("IN4-2")
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PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("IN4-3")
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PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("IN4-4")
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PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("IN4-5")
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PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("IN4-6")
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PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("IN4-7")
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PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("IN4-8")
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PORT_START("DSW1")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSW2")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSW3")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_START("DSW4")
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PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
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PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
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PORT_DIPSETTING( 0x00, DEF_STR( On ) )
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PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
|
|
@ -587,6 +467,8 @@ static MACHINE_CONFIG_START( jubileep, jubilee_state )
|
|||
MCFG_TMS99xx_ADD("maincpu", TMS9980A, CPU_CLOCK, jubileep_map, jubileep_cru_map, cpuconf)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", jubilee_state, jubileep_interrupt)
|
||||
|
||||
MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE(60)
|
||||
|
|
|
|||
Loading…
Reference in a new issue