Added 9602 one-shot to netlist. (nw)

This commit is contained in:
couriersud 2015-04-19 22:56:56 +02:00
parent 91a86a45e1
commit 2ff982fef7
4 changed files with 148 additions and 17 deletions

View file

@ -0,0 +1,51 @@
/*
* 9602_mstable.c
*
*/
#include "netlist/devices/net_lib.h"
NETLIST_START(74123_mstable)
/*
* Monoflog
*
*/
/* Standard stuff */
SOLVER(Solver, 48000)
ANALOG_INPUT(V5, 5) // 5V
/* Wiring up the 74123 */
CLOCK(clk, 50)
TTL_9602_DIP(mf)
RES(R, 10000)
CAP(C, 1e-6)
NET_C(GND, mf.8) //
NET_C(V5, mf.16) //
NET_C(C.1, mf.1)
NET_C(mf.1, GND) // Test - can be removed
NET_C(C.2, mf.2, R.2)
NET_C(R.1, V5)
NET_C(mf.3, V5) // CLR
NET_C(mf.4, GND) // B
NET_C(mf.5, clk.Q) // A
LOG(logC, C.2)
LOG(logQ, mf.6) //Q
LOG(logX, clk.Q)
// avoid non connected inputs
NET_C(mf.11, V5)
NET_C(mf.12, V5)
NET_C(mf.13, V5)
NETLIST_END()

View file

@ -144,6 +144,7 @@ void nl_initialize_factory(netlist_factory_t &factory)
ENTRY(74107_dip, TTL_74107_DIP, "-")
ENTRY(74123_dip, TTL_74123_DIP, "-")
ENTRY(74153_dip, TTL_74153_DIP, "-")
ENTRY(9602_dip, TTL_9602_DIP, "-")
ENTRY(9316_dip, TTL_9316_DIP, "-")
ENTRY(SN74LS629_dip, SN74LS629_DIP, "1.CAP1,2.CAP2")
ENTRY(NE555_dip, NE555_DIP, "-")

View file

@ -10,6 +10,8 @@
NETLIB_START(74123)
{
m_dev_type = 74123;
register_sub(m_RP, "RP");
register_sub(m_RN, "RN");
@ -41,7 +43,13 @@ NETLIB_START(74123)
NETLIB_UPDATE(74123)
{
const netlist_sig_t m_trig = (INPLOGIC(m_A) ^ 1) & INPLOGIC(m_B) & INPLOGIC(m_CLRQ);
netlist_sig_t m_trig;
if (m_dev_type == 74123)
m_trig = (INPLOGIC(m_A) ^ 1) & INPLOGIC(m_B) & INPLOGIC(m_CLRQ);
else
// 9602
m_trig = (INPLOGIC(m_A) ^ 1) | INPLOGIC(m_B);
if (!INPLOGIC(m_CLRQ))
{
@ -104,26 +112,28 @@ NETLIB_RESET(74123)
NETLIB_START(74123_dip)
{
#if 0
register_sub(m_1, "1");
register_sub(m_2, "2");
register_sub(m_3, "3");
register_subalias("1", m_1.m_i[0]);
register_subalias("2", m_1.m_i[1]);
register_subalias("3", m_2.m_i[0]);
register_subalias("4", m_2.m_i[1]);
register_subalias("5", m_2.m_i[2]);
register_subalias("6", m_2.m_Q);
register_subalias("1", m_1.m_A);
register_subalias("2", m_1.m_B);
register_subalias("3", m_1.m_CLRQ);
register_subalias("4", m_1.m_QQ);
register_subalias("5", m_2.m_Q);
register_subalias("6", m_2.m_RN.m_N);
register_subalias("7", m_2.m_RN.m_P);
register_subalias("8", m_1.m_RN.m_N);
connect(m_1.m_RN.m_N, m_2.m_RN.m_N);
register_subalias("8", m_3.m_Q);
register_subalias("9", m_3.m_i[0]);
register_subalias("10", m_3.m_i[1]);
register_subalias("11", m_3.m_i[2]);
register_subalias("12", m_1.m_Q);
register_subalias("13", m_1.m_i[2]);
#endif
register_subalias("9", m_2.m_A);
register_subalias("10", m_2.m_B);
register_subalias("11", m_2.m_CLRQ);
register_subalias("12", m_2.m_QQ);
register_subalias("13", m_1.m_Q);
register_subalias("14", m_1.m_RN.m_N);
register_subalias("15", m_1.m_RN.m_P);
register_subalias("16", m_1.m_RP.m_P);
connect(m_1.m_RP.m_P, m_2.m_RP.m_P);
}
NETLIB_UPDATE(74123_dip)
@ -138,3 +148,45 @@ NETLIB_RESET(74123_dip)
m_1.do_reset();
m_2.do_reset();
}
NETLIB_START(9602_dip)
{
register_sub(m_1, "1");
register_sub(m_2, "2");
m_1.m_dev_type = 9602;
m_2.m_dev_type = 9602;
register_subalias("1", m_1.m_RN.m_N); // C1
register_subalias("2", m_1.m_RN.m_P); // RC1
register_subalias("3", m_1.m_CLRQ);
register_subalias("4", m_1.m_B);
register_subalias("5", m_1.m_A);
register_subalias("6", m_1.m_Q);
register_subalias("7", m_1.m_QQ);
register_subalias("8", m_1.m_RN.m_N);
connect(m_1.m_RN.m_N, m_2.m_RN.m_N);
register_subalias("9", m_2.m_QQ);
register_subalias("10", m_2.m_Q);
register_subalias("11", m_2.m_A);
register_subalias("12", m_2.m_B);
register_subalias("13", m_2.m_CLRQ);
register_subalias("14", m_2.m_RN.m_P); // RC2
register_subalias("15", m_2.m_RN.m_N); // C2
register_subalias("16", m_1.m_RP.m_P);
connect(m_1.m_RP.m_P, m_2.m_RP.m_P);
}
NETLIB_UPDATE(9602_dip)
{
/* only called during startup */
m_1.update_dev();
m_2.update_dev();
}
NETLIB_RESET(9602_dip)
{
m_1.do_reset();
m_2.do_reset();
}

View file

@ -18,6 +18,18 @@
*
* Naming conventions follow Fairchild Semiconductor datasheet
*
* DM9602: Dual Retriggerable, Resettable One Shots
*
* +--------------+
* C1 |1 ++ 16| VCC
* RC1 |2 15| C2
* CLR1 |3 14| RC2
* B1 |4 9602 13| CLR2
* A1 |5 12| B2
* Q1 |6 11| A2
* Q1Q |7 10| Q2
* GND |8 9| Q2Q
* +--------------+
*/
#ifndef NLD_74123_H_
@ -50,6 +62,7 @@ public:
netlist_param_double_t m_K;
netlist_param_double_t m_RI;
int m_dev_type;
);
#define TTL_74123_DIP(_name) \
@ -62,5 +75,19 @@ NETLIB_DEVICE(74123_dip,
);
/* The 9602 is very similar to the 123. Input triggering is slightly different
* THe 9602 uses an OR gate instead of an AND gate.
*/
#define TTL_9602_DIP(_name) \
NET_REGISTER_DEV(9602_dip, _name)
NETLIB_DEVICE(9602_dip,
NETLIB_NAME(74123) m_1;
NETLIB_NAME(74123) m_2;
);
#endif /* NLD_74123_H_ */