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wtf (nw)
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parent
b68bbb4381
commit
2ed51f954d
4 changed files with 32 additions and 38 deletions
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@ -33,8 +33,8 @@ ics2115_device::ics2115_device(const machine_config &mconfig, const char *tag, d
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void ics2115_device::device_start()
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{
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m_rom = *region();
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m_timer[0].timer = machine().scheduler().timer_alloc(FUNC(timer_cb_0), this);
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m_timer[1].timer = machine().scheduler().timer_alloc(FUNC(timer_cb_1), this);
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m_timer[0].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ics2115_device::timer_cb_0),this), this);
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m_timer[1].timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(ics2115_device::timer_cb_1),this), this);
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m_stream = machine().sound().stream_alloc(*this, 0, 2, 33075);
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//Exact formula as per patent 5809466
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@ -761,22 +761,20 @@ void ics2115_device::reg_write(UINT8 data, bool msb) {
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}
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}
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//UINT8 ics2115_device::read (offs_t offset)
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READ8_DEVICE_HANDLER(ics2115_device::read)
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READ8_MEMBER(ics2115_device::read)
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{
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ics2115_device *chip = downcast<ics2115_device *>(device);
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UINT8 ret = 0;
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switch(offset) {
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case 0:
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//TODO: check this suspect code
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if (chip->m_irq_on) {
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if (m_irq_on) {
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ret |= 0x80;
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if (chip->m_irq_enabled && (chip->m_irq_pending & 3))
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if (m_irq_enabled && (m_irq_pending & 3))
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ret |= 1;
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for (int i = 0; i <= chip->m_active_osc; i++) {
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if (//chip->m_voice[i].vol_ctrl.irq_pending ||
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chip->m_voice[i].osc_conf.irq_pending) {
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for (int i = 0; i <= m_active_osc; i++) {
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if (//m_voice[i].vol_ctrl.irq_pending ||
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m_voice[i].osc_conf.irq_pending) {
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ret |= 2;
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break;
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}
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@ -785,13 +783,13 @@ READ8_DEVICE_HANDLER(ics2115_device::read)
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break;
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case 1:
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ret = chip->m_reg_select;
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ret = m_reg_select;
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break;
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case 2:
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ret = (UINT8)(chip->reg_read());
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ret = (UINT8)(reg_read());
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break;
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case 3:
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ret = chip->reg_read() >> 8;
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ret = reg_read() >> 8;
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break;
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default:
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#ifdef ICS2115_DEBUG
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@ -802,19 +800,17 @@ READ8_DEVICE_HANDLER(ics2115_device::read)
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return ret;
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}
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//UINT8 ics2115_device::write(offs_t offset, UINT8 data)
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WRITE8_DEVICE_HANDLER(ics2115_device::write)
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WRITE8_MEMBER(ics2115_device::write)
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{
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ics2115_device *chip = downcast<ics2115_device *>(device);
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switch(offset) {
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case 1:
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chip->m_reg_select = data;
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m_reg_select = data;
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break;
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case 2:
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chip->reg_write(data,0);
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reg_write(data,0);
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break;
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case 3:
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chip->reg_write(data,1);
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reg_write(data,1);
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break;
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default:
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#ifdef ICS2115_DEBUG
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@ -866,18 +862,16 @@ void ics2115_device::recalc_irq()
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m_irq_cb(this, irq ? ASSERT_LINE : CLEAR_LINE);
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}
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TIMER_CALLBACK( ics2115_device::timer_cb_0 )
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TIMER_CALLBACK_MEMBER( ics2115_device::timer_cb_0 )
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{
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ics2115_device *chip = (ics2115_device *)ptr;
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chip->m_irq_pending |= 1 << 0;
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chip->recalc_irq();
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m_irq_pending |= 1 << 0;
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recalc_irq();
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}
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TIMER_CALLBACK( ics2115_device::timer_cb_1 )
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TIMER_CALLBACK_MEMBER( ics2115_device::timer_cb_1 )
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{
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ics2115_device *chip = (ics2115_device *)ptr;
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chip->m_irq_pending |= 1 << 1;
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chip->recalc_irq();
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m_irq_pending |= 1 << 1;
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recalc_irq();
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}
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void ics2115_device::recalc_timer(int timer)
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@ -98,12 +98,12 @@ public:
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// inline configuration helpers
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static void static_set_irqf(device_t &device, void (*irqf)(device_t *device, int state));
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static DECLARE_READ8_DEVICE_HANDLER(read);
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static DECLARE_WRITE8_DEVICE_HANDLER(write);
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DECLARE_READ8_MEMBER(read);
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DECLARE_WRITE8_MEMBER(write);
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//UINT8 read(offs_t offset);
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//void write(offs_t offset, UINT8 data);
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static TIMER_CALLBACK(timer_cb_0);
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static TIMER_CALLBACK(timer_cb_1);
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TIMER_CALLBACK_MEMBER(timer_cb_0);
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TIMER_CALLBACK_MEMBER(timer_cb_1);
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sound_stream *m_stream;
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@ -2588,9 +2588,9 @@ READ16_MEMBER(igs011_state::ics2115_word_r)
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ics2115_device* ics2115 = machine().device<ics2115_device>("ics");
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switch(offset)
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{
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case 0: return ics2115_device::read(ics2115, space, (offs_t)0);
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case 1: return ics2115_device::read(ics2115, space, (offs_t)1);
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case 2: return (ics2115_device::read(ics2115, space, (offs_t)3) << 8) | ics2115_device::read(ics2115, space, (offs_t)2);
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case 0: return ics2115->read(space, (offs_t)0);
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case 1: return ics2115->read(space, (offs_t)1);
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case 2: return (ics2115->read(space, (offs_t)3) << 8) | ics2115->read(space, (offs_t)2);
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}
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return 0xff;
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}
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@ -2601,11 +2601,11 @@ WRITE16_MEMBER(igs011_state::ics2115_word_w)
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switch(offset)
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{
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case 1:
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if (ACCESSING_BITS_0_7) ics2115_device::write(ics2115,space, 1,data);
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if (ACCESSING_BITS_0_7) ics2115->write(space, 1,data);
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break;
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case 2:
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if (ACCESSING_BITS_0_7) ics2115_device::write(ics2115,space, 2,data);
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if (ACCESSING_BITS_8_15) ics2115_device::write(ics2115,space, 3,data>>8);
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if (ACCESSING_BITS_0_7) ics2115->write(space, 2,data);
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if (ACCESSING_BITS_8_15) ics2115->write(space, 3,data>>8);
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break;
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}
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}
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@ -302,7 +302,7 @@ ADDRESS_MAP_START( pgm_z80_mem, AS_PROGRAM, 8, pgm_state )
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ADDRESS_MAP_END
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ADDRESS_MAP_START( pgm_z80_io, AS_IO, 8, pgm_state )
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AM_RANGE(0x8000, 0x8003) AM_DEVREADWRITE_LEGACY("ics", ics2115_device::read, ics2115_device::write)
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AM_RANGE(0x8000, 0x8003) AM_DEVREADWRITE("ics", ics2115_device, read, write)
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AM_RANGE(0x8100, 0x81ff) AM_READ(soundlatch3_byte_r) AM_WRITE(z80_l3_w)
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AM_RANGE(0x8200, 0x82ff) AM_READWRITE(soundlatch_byte_r, soundlatch_byte_w)
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AM_RANGE(0x8400, 0x84ff) AM_READWRITE(soundlatch2_byte_r, soundlatch2_byte_w)
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