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Fixed I2C for Mega Drive, NBA Jam TE is still broken due of a mem_mask issue (slot code thinks it's always a word access, but it actually isn't most of the time)

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This commit is contained in:
Angelo Salese 2013-03-18 04:06:17 +00:00
parent c4303b0648
commit 2da4d7f317
1 changed files with 33 additions and 20 deletions
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53
src/mess/machine/md_eeprom.c
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@ -109,25 +109,25 @@ md_eeprom_blara_device::md_eeprom_blara_device(const machine_config &mconfig, co
static const i2cmem_interface md_24c01_i2cmem_interface =
{
I2CMEM_SLAVE_ADDRESS, 0, 0x80
I2CMEM_SLAVE_ADDRESS, 4, 0x80
};
static const i2cmem_interface md_24c02_i2cmem_interface =
{
I2CMEM_SLAVE_ADDRESS, 0, 0x100
I2CMEM_SLAVE_ADDRESS, 4, 0x100
};
static const i2cmem_interface md_24c16_i2cmem_interface =
{
I2CMEM_SLAVE_ADDRESS, 0, 0x800
I2CMEM_SLAVE_ADDRESS, 8, 0x800
};
static const i2cmem_interface md_24c64_i2cmem_interface =
{
I2CMEM_SLAVE_ADDRESS, 0, 0x2000
I2CMEM_SLAVE_ADDRESS, 8, 0x2000
};
@ -217,8 +217,7 @@ READ16_MEMBER(md_std_eeprom_device::read)
{
if (offset == 0x200000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return ~m_i2c_mem & 1;
return i2cmem_sda_read(m_i2cmem);
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];
@ -242,7 +241,7 @@ READ16_MEMBER(md_eeprom_nbajam_device::read)
if (offset == 0x200000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return m_i2c_mem & 1;
return i2cmem_sda_read(m_i2cmem);
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];
@ -266,7 +265,7 @@ READ16_MEMBER(md_eeprom_nbajamte_device::read)
if (offset == 0x200000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return m_i2c_mem & 1;
return i2cmem_sda_read(m_i2cmem);
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];
@ -278,10 +277,17 @@ WRITE16_MEMBER(md_eeprom_nbajamte_device::write)
{
if (offset == 0x200000/2)
{
m_i2c_clk = BIT(data, 8);
m_i2c_mem = BIT(data, 0);
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
if(ACCESSING_BITS_8_15)
{
m_i2c_clk = BIT(data, 8);
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
}
if(ACCESSING_BITS_0_7)
{
m_i2c_mem = BIT(data, 0);
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
}
}
}
@ -291,7 +297,7 @@ READ16_MEMBER(md_eeprom_cslam_device::read)
if (offset == 0x200000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return m_i2c_mem & 1;
return i2cmem_sda_read(m_i2cmem);
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];
@ -303,10 +309,17 @@ WRITE16_MEMBER(md_eeprom_cslam_device::write)
{
if (offset == 0x200000/2)
{
m_i2c_clk = BIT(data, 8);
m_i2c_mem = BIT(data, 0);
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
if(ACCESSING_BITS_8_15)
{
m_i2c_clk = BIT(data, 8);
i2cmem_scl_write(m_i2cmem, m_i2c_clk);
}
if(ACCESSING_BITS_0_7)
{
m_i2c_mem = BIT(data, 0);
i2cmem_sda_write(m_i2cmem, m_i2c_mem);
}
}
}
@ -316,7 +329,7 @@ READ16_MEMBER(md_eeprom_nflqb_device::read)
if (offset == 0x200000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return m_i2c_mem & 1;
return i2cmem_sda_read(m_i2cmem);
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];
@ -340,7 +353,7 @@ READ16_MEMBER(md_eeprom_nhlpa_device::read)
if (offset == 0x200000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return (m_i2c_mem & 1) << 7;
return (i2cmem_sda_read(m_i2cmem) & 1) << 7;
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];
@ -364,7 +377,7 @@ READ16_MEMBER(md_eeprom_blara_device::read)
if (offset == 0x380000/2)
{
// m_i2c_mem = i2cmem_sda_read(m_i2cmem);
return (m_i2c_mem & 1) << 7;
return (i2cmem_sda_read(m_i2cmem) & 1) << 7;
}
if (offset < 0x400000/2)
return m_rom[MD_ADDR(offset)];