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cpu/z80/r800.cpp: (#12530)
- Removed undocumented Z80 instructions that are not supported by the R800 - Updated basic instruction timing - Implement MULUB and MULUW Other R800 features are not implemented
This commit is contained in:
wilbertpol
GitHub
parent
4183b96612
commit
2c479b20dd
6 changed files with 2194 additions and 44 deletions
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@ -3001,11 +3001,13 @@ if CPUS["Z80"] or CPUS["KC80"] or CPUS["Z80N"] then
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dependency {
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{ MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80.hxx" },
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{ MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/ncs800.hxx" },
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{ MAME_DIR .. "src/devices/cpu/z80/r800.cpp", GEN_DIR .. "emu/cpu/z80/r800.hxx" },
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}
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custombuildtask {
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{ MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating Z80 source file...", PYTHON .. " $(1) $(<) $(@)" } },
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{ MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/ncs800.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating NSC800 source file...", PYTHON .. " $(1) ncs800 $(<) $(@)" } },
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{ MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/r800.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating R800 source file...", PYTHON .. " $(1) r800 $(<) $(@)" } },
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}
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end
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@ -1,17 +1,33 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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// copyright-holders:AJR,Wilbert Pol
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/***************************************************************************
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ASCII R800 CPU
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TODO: this uses a sped-up Z80 core with added multiply instructions
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('mulub', 'muluw').
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TODO:
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- Internal configuration registers.
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- External 24 bits address bus accessible through 9 memory mappers.
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- DMA channels.
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- Interrupt levels.
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- Bits 3 and 5 of the flag register behave differently from the z80.
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- Page break penalties.
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- Refresh delays.
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***************************************************************************/
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#include "emu.h"
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#include "r800.h"
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#include "r800dasm.h"
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#define LOG_UNDOC (1U << 1)
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#define LOG_INT (1U << 2)
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#define LOG_TIME (1U << 3)
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//#define VERBOSE ( LOG_UNDOC /*| LOG_INT*/ )
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#include "logmacro.h"
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#define LOGUNDOC(...) LOGMASKED(LOG_UNDOC, __VA_ARGS__)
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#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__)
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//**************************************************************************
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// GLOBAL VARIABLES
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@ -32,4 +48,135 @@ DEFINE_DEVICE_TYPE(R800, r800_device, "r800", "ASCII R800")
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r800_device::r800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: z80_device(mconfig, R800, tag, owner, clock)
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{
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z80_set_m1_cycles(1);
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z80_set_memrq_cycles(1);
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z80_set_iorq_cycles(1);
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}
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std::unique_ptr<util::disasm_interface> r800_device::create_disassembler()
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{
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return std::make_unique<r800_disassembler>();
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}
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void r800_device::device_validity_check(validity_checker &valid) const
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{
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cpu_device::device_validity_check(valid);
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}
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#define HAS_LDAIR_QUIRK 0
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/****************************************************************************
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* The Z80 registers. halt is set to 1 when the CPU is halted, the refresh
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* register is calculated as follows: refresh = (r & 127) | (r2 & 128)
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****************************************************************************/
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#define CF 0x01
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#define NF 0x02
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#define PF 0x04
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#define VF PF
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#define XF 0x08
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#define HF 0x10
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#define YF 0x20
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#define ZF 0x40
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#define SF 0x80
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#define INT_IRQ 0x01
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#define NMI_IRQ 0x02
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#define PRVPC m_prvpc.d // previous program counter
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#define PCD m_pc.d
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#define PC m_pc.w.l
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#define SPD m_sp.d
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#define SP m_sp.w.l
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#define AFD m_af.d
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#define AF m_af.w.l
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#define A m_af.b.h
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#define F m_af.b.l
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#define Q m_q
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#define QT m_qtemp
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#define I m_i
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#define R m_r
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#define R2 m_r2
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#define BCD m_bc.d
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#define BC m_bc.w.l
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#define B m_bc.b.h
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#define C m_bc.b.l
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#define DED m_de.d
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#define DE m_de.w.l
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#define D m_de.b.h
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#define E m_de.b.l
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#define HLD m_hl.d
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#define HL m_hl.w.l
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#define H m_hl.b.h
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#define L m_hl.b.l
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#define IXD m_ix.d
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#define IX m_ix.w.l
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#define HX m_ix.b.h
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#define LX m_ix.b.l
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#define IYD m_iy.d
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#define IY m_iy.w.l
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#define HY m_iy.b.h
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#define LY m_iy.b.l
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#define WZ m_wz.w.l
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#define WZ_H m_wz.b.h
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#define WZ_L m_wz.b.l
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#define TADR m_shared_addr.w // Typically represents values from A0..15 pins. 16bit input in steps.
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#define TADR_H m_shared_addr.b.h
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#define TADR_L m_shared_addr.b.l
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#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps.
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#define TDAT2 m_shared_data2.w
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#define TDAT_H m_shared_data.b.h
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#define TDAT_L m_shared_data.b.l
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#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps.
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/***************************************************************
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* adjust cycle count by n T-states
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***************************************************************/
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#define T(icount) { m_icount -= icount; }
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/***************************************************************
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* SLL r8
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***************************************************************/
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u8 r800_device::r800_sll(u8 value)
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{
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const u8 c = (value & 0x80) ? CF : 0;
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const u8 res = u8(value << 1);
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set_f(SZP[res] | c);
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return res;
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}
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void r800_device::mulub(u8 value)
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{
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const u16 res = A * value;
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HL = res;
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const u8 c = (H) ? CF : 0;
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const u8 z = (res) ? 0 : ZF;
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set_f((F & (HF|NF)) | z | c);
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}
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void r800_device::muluw(u16 value)
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{
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const u32 res = HL * value;
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DE = res >> 16;
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HL = res & 0xffff;
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const u8 c = (DE) ? CF : 0;
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const u8 z = (res) ? 0 : ZF;
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set_f((F & (HF|NF)) | z | c);
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}
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void r800_device::do_op()
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{
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#include "cpu/z80/r800.hxx"
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}
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:AJR
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// copyright-holders:AJR,Wilbert Pol
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/***************************************************************************
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ASCII R800 CPU
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@ -24,10 +24,25 @@ public:
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// device type constructor
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r800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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static constexpr feature_type imperfect_features() { return feature::TIMING; }
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protected:
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// device_t implementation
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virtual void device_validity_check(validity_checker &valid) const override;
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// device_execute_interface overrides
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virtual u32 execute_min_cycles() const noexcept override { return 1; }
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virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
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virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
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// device_disasm_interface implementation
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virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
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u8 r800_sll(u8 value);
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void mulub(u8 value);
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void muluw(u16 value);
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virtual void do_op() override;
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};
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// device type declaration
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@ -27,15 +27,14 @@ TODO:
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#include "z80.inc"
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static bool tables_initialised = false;
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std::unique_ptr<u8[]> z80_device::SZ = std::make_unique<u8[]>(0x100); // zero and sign flags
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std::unique_ptr<u8[]> z80_device::SZ_BIT = std::make_unique<u8[]>(0x100); // zero, sign and parity/overflow (=zero) flags for BIT opcode
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std::unique_ptr<u8[]> z80_device::SZP = std::make_unique<u8[]>(0x100); // zero, sign and parity flags
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std::unique_ptr<u8[]> z80_device::SZHV_inc = std::make_unique<u8[]>(0x100); // zero, sign, half carry and overflow flags INC r8
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std::unique_ptr<u8[]> z80_device::SZHV_dec = std::make_unique<u8[]>(0x100); // zero, sign, half carry and overflow flags DEC r8
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std::unique_ptr<u8[]> z80_device::SZHVC_add = std::make_unique<u8[]>(2 * 0x100 * 0x100);
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std::unique_ptr<u8[]> z80_device::SZHVC_sub = std::make_unique<u8[]>(2 * 0x100 * 0x100);
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bool z80_device::tables_initialised = false;
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u8 z80_device::SZ[] = {}; // zero and sign flags
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u8 z80_device::SZ_BIT[] = {}; // zero, sign and parity/overflow (=zero) flags for BIT opcode
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u8 z80_device::SZP[] = {}; // zero, sign and parity flags
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u8 z80_device::SZHV_inc[] = {}; // zero, sign, half carry and overflow flags INC r8
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u8 z80_device::SZHV_dec[] = {}; // zero, sign, half carry and overflow flags DEC r8
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u8 z80_device::SZHVC_add[] = {};
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u8 z80_device::SZHVC_sub[] = {};
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/***************************************************************
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@ -538,14 +537,8 @@ void z80_device::device_start()
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for (int i = 0; i < 256; i++)
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{
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int p = 0;
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if( i&0x01 ) ++p;
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if( i&0x02 ) ++p;
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if( i&0x04 ) ++p;
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if( i&0x08 ) ++p;
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if( i&0x10 ) ++p;
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if( i&0x20 ) ++p;
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if( i&0x40 ) ++p;
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if( i&0x80 ) ++p;
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for (int b = 0; b < 8; b++)
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p += BIT(i, b);
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SZ[i] = i ? i & SF : ZF;
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SZ[i] |= (i & (YF | XF)); // undocumented flag bits 5+3
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SZ_BIT[i] = i ? i & SF : ZF | PF;
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@ -181,14 +181,15 @@ protected:
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u8 m_memrq_cycles;
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u8 m_iorq_cycles;
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static std::unique_ptr<u8[]> SZ; // zero and sign flags
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static std::unique_ptr<u8[]> SZ_BIT; // zero, sign and parity/overflow (=zero) flags for BIT opcode
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static std::unique_ptr<u8[]> SZP; // zero, sign and parity flags
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static std::unique_ptr<u8[]> SZHV_inc; // zero, sign, half carry and overflow flags INC r8
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static std::unique_ptr<u8[]> SZHV_dec; // zero, sign, half carry and overflow flags DEC r8
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static bool tables_initialised;
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static u8 SZ[0x100]; // zero and sign flags
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static u8 SZ_BIT[0x100]; // zero, sign and parity/overflow (=zero) flags for BIT opcode
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static u8 SZP[0x100]; // zero, sign and parity flags
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static u8 SZHV_inc[0x100]; // zero, sign, half carry and overflow flags INC r8
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static u8 SZHV_dec[0x100]; // zero, sign, half carry and overflow flags DEC r8
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static std::unique_ptr<u8[]> SZHVC_add;
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static std::unique_ptr<u8[]> SZHVC_sub;
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static u8 SZHVC_add[2 * 0x100 * 0x100];
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static u8 SZHVC_sub[2 * 0x100 * 0x100];
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};
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DECLARE_DEVICE_TYPE(Z80, z80_device)
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