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Cleaned up miscellaneous stuff.

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This commit is contained in:
Vas Crabb 2024-10-31 06:43:37 +11:00
parent 6be5b15b3e
commit 2a606c86e0
12 changed files with 121 additions and 111 deletions
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2
src/devices/bus/vcs_ctrl/trakball.cpp
View file

@ -80,6 +80,8 @@ ioport_constructor atari_trakball_device::device_input_ports() const
void atari_trakball_device::device_start()
{
save_item(NAME(m_last_pos));
save_item(NAME(m_last_direction));
}
#define QUADRATURE_ANGLE_RESOLUTION 0x02

4
src/devices/bus/vcs_ctrl/trakball.h
View file

@ -37,11 +37,11 @@ protected:
virtual u8 vcs_joy_r() override;
private:
void trakball_pos_and_dir_upd(int axis);
required_ioport m_trakballb;
required_ioport_array<2> m_trakballxy;
void trakball_pos_and_dir_upd(int axis);
uint32_t m_last_pos[2];
uint8_t m_last_direction[2];
};

31
src/lib/formats/86f_dsk.cpp
View file

@ -9,6 +9,8 @@
#include <tuple>
namespace {
#define _86F_FORMAT_HEADER "86BF"
#pragma pack(1)
@ -24,6 +26,35 @@ struct _86FIMG
#pragma pack()
enum
{
SURFACE_DESC = 1,
TYPE_MASK = 6,
TYPE_DD = 0,
TYPE_HD = 2,
TYPE_ED = 4,
TYPE_ED2000 = 6,
TWO_SIDES = 8,
WRITE_PROTECT = 0x10,
RPM_MASK = 0x60,
RPM_0 = 0,
RPM_1 = 0x20,
RPM_15 = 0x40,
RPM_2 = 0x60,
EXTRA_BC = 0x80,
ZONED_RPM = 0x100,
ZONE_PREA2_1 = 0,
ZONE_PREA2_2 = 0x200,
ZONE_A2 = 0x400,
ZONE_C64 = 0x600,
ENDIAN_BIG = 0x800,
RPM_FAST = 0x1000,
TOTAL_BC = 0x1000
};
} // anonymous namespace
_86f_format::_86f_format() : floppy_image_format_t()
{
}

25
src/lib/formats/86f_dsk.h
View file

@ -30,31 +30,6 @@ public:
private:
void generate_track_from_bitstream_with_weak(int track, int head, const uint8_t *trackbuf, const uint8_t *weak, int index_cell, int track_size, floppy_image &image) const;
enum
{
SURFACE_DESC = 1,
TYPE_MASK = 6,
TYPE_DD = 0,
TYPE_HD = 2,
TYPE_ED = 4,
TYPE_ED2000 = 6,
TWO_SIDES = 8,
WRITE_PROTECT = 0x10,
RPM_MASK = 0x60,
RPM_0 = 0,
RPM_1 = 0x20,
RPM_15 = 0x40,
RPM_2 = 0x60,
EXTRA_BC = 0x80,
ZONED_RPM = 0x100,
ZONE_PREA2_1 = 0,
ZONE_PREA2_2 = 0x200,
ZONE_A2 = 0x400,
ZONE_C64 = 0x600,
ENDIAN_BIG = 0x800,
RPM_FAST = 0x1000,
TOTAL_BC = 0x1000
};
};
extern const _86f_format FLOPPY_86F_FORMAT;

3
src/mame/irem/vigilant.cpp
View file

@ -793,9 +793,8 @@ void captainx_state::captainx(machine_config &config)
{
buccanrs(config);
Z80(config.replace(), m_maincpu, 5_MHz_XTAL);
m_maincpu->set_clock(5_MHz_XTAL);
m_maincpu->set_addrmap(AS_PROGRAM, &captainx_state::captainx_map);
m_maincpu->set_addrmap(AS_IO, &captainx_state::vigilant_io_map);
M68705R3(config, m_mcu, 5_MHz_XTAL / 2); // unknown clock
m_mcu->porta_w().set(FUNC(captainx_state::mcu_porta_w));

73
src/mame/namco/vpx3220a.cpp
View file

@ -16,6 +16,67 @@
DEFINE_DEVICE_TYPE(VPX3220A, vpx3220a_device, "vpx3220a", "VPX-3220A Video Pixel Decoder")
enum vpx3220a_device::subaddr_t : u8
{
IDENT = 0x00,
IFC = 0x20,
FPRD = 0x26,
FPWR = 0x27,
FPDAT = 0x28,
FPSTA = 0x29,
AFEND = 0x33,
REFSIG = 0xd8,
YMAX = 0xe0,
YMIN = 0xe1,
UMAX = 0xe2,
UMIN = 0xe3,
VMAX = 0xe4,
VMIN = 0xe5,
CBM_BRI = 0xe6,
CBM_CON = 0xe7,
FORMAT = 0xe8,
MISC = 0xea,
OFIFO = 0xf0,
OMUX = 0xf1,
OENA = 0xf2,
DRIVER_A = 0xf8,
DRIVER_B = 0xf9,
UNKNOWN = 0xff
};
enum vpx3220a_device::fpaddr_t : u16
{
TINT = 0x1c,
GAIN = 0x20,
XLG = 0x26,
HPLL = 0x4b,
DVCO = 0x58,
ADJUST = 0x59,
VBEG1 = 0x88,
VLINEI1 = 0x89,
VLINEO1 = 0x8a,
HBEG1 = 0x8b,
HLEN1 = 0x8c,
NPIX1 = 0x8d,
VBEG2 = 0x8e,
VLINEI2 = 0x8f,
VLINEO2 = 0x90,
HBEG2 = 0x91,
HLEN2 = 0x92,
NPIX2 = 0x93,
ACCREF = 0xa0,
ACCR = 0xa3,
ACCB = 0xa4,
KILVL = 0xa8,
AGCREF = 0xb2,
SGAIN = 0xbe,
VSDT = 0xe7,
CMDWD = 0xf0,
INFOWD = 0xf1,
TVSTNDWR = 0xf2,
TVSTNDRD = 0xf3
};
vpx3220a_device::vpx3220a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, VPX3220A, tag, owner, clock)
, i2c_hle_interface(mconfig, *this, 0x43)
@ -193,7 +254,7 @@ u8 vpx3220a_device::read_data(u16 offset)
return 0;
case TVSTNDWR: {
static char const *STANDARD_NAMES[8] =
static char const *const STANDARD_NAMES[8] =
{
"PAL B/G/H/I",
"NTSC M",
@ -258,7 +319,7 @@ void vpx3220a_device::write_data(u16 offset, u8 data)
switch (offset)
{
case IFC: {
static char const *IF_NAMES[4] = { "12 dB", "Reserved", "6 dB", "0 dB" };
static char const *const IF_NAMES[4] = { "12 dB", "Reserved", "6 dB", "0 dB" };
LOG("%s: Write Chroma Processing: %02x\n", machine().describe_context(), data);
LOG("%s: IF Compensation: %s\n", machine().describe_context(), IF_NAMES[data & 3]);
} break;
@ -280,7 +341,7 @@ void vpx3220a_device::write_data(u16 offset, u8 data)
break;
case AFEND: {
static char const *LUMA_NAMES[4] = { "VIN3", "VIN2", "VIN1", "Reserved" };
static char const *const LUMA_NAMES[4] = { "VIN3", "VIN2", "VIN1", "Reserved" };
LOG("%s: Write Analog Front-End Register: %02x\n", machine().describe_context(), data);
LOG("%s: Input Selector Luma ADC: %s\n", machine().describe_context(), LUMA_NAMES[data & 3]);
LOG("%s: Input Selector Luma ADC: %s\n", machine().describe_context(), LUMA_NAMES[data & 3]);
@ -328,7 +389,7 @@ void vpx3220a_device::write_data(u16 offset, u8 data)
break;
case FORMAT: {
static char const *FORMAT_NAMES[8] =
static char const *const FORMAT_NAMES[8] =
{
"YUV 4:2:2, YUV 4:2:2 ITUR",
"YUV 4:4:4",
@ -356,7 +417,7 @@ void vpx3220a_device::write_data(u16 offset, u8 data)
break;
case OFIFO: {
static char const *SHUFFLE_NAMES[8] =
static char const *const SHUFFLE_NAMES[8] =
{
"000 Out[23:0] = In[23:0]",
"001",
@ -373,7 +434,7 @@ void vpx3220a_device::write_data(u16 offset, u8 data)
} break;
case OMUX: {
static char const *PORT_MODE_NAMES[4] =
static char const *const PORT_MODE_NAMES[4] =
{
"Parallel Out, 'Single Clock' A = FifoOut[23:16], B = FifoOut[15:8]",
"'Double Clock' A = FifoOut[23:16] / FifoOut[15:8], B = FifoOut[7:0]",

62
src/mame/namco/vpx3220a.h
View file

@ -28,66 +28,8 @@ protected:
virtual void write_data(u16 offset, u8 data) override;
private:
enum subaddr_t : u8
{
IDENT = 0x00,
IFC = 0x20,
FPRD = 0x26,
FPWR = 0x27,
FPDAT = 0x28,
FPSTA = 0x29,
AFEND = 0x33,
REFSIG = 0xd8,
YMAX = 0xe0,
YMIN = 0xe1,
UMAX = 0xe2,
UMIN = 0xe3,
VMAX = 0xe4,
VMIN = 0xe5,
CBM_BRI = 0xe6,
CBM_CON = 0xe7,
FORMAT = 0xe8,
MISC = 0xea,
OFIFO = 0xf0,
OMUX = 0xf1,
OENA = 0xf2,
DRIVER_A = 0xf8,
DRIVER_B = 0xf9,
UNKNOWN = 0xff
};
enum fpaddr_t : u16
{
TINT = 0x1c,
GAIN = 0x20,
XLG = 0x26,
HPLL = 0x4b,
DVCO = 0x58,
ADJUST = 0x59,
VBEG1 = 0x88,
VLINEI1 = 0x89,
VLINEO1 = 0x8a,
HBEG1 = 0x8b,
HLEN1 = 0x8c,
NPIX1 = 0x8d,
VBEG2 = 0x8e,
VLINEI2 = 0x8f,
VLINEO2 = 0x90,
HBEG2 = 0x91,
HLEN2 = 0x92,
NPIX2 = 0x93,
ACCREF = 0xa0,
ACCR = 0xa3,
ACCB = 0xa4,
KILVL = 0xa8,
AGCREF = 0xb2,
SGAIN = 0xbe,
VSDT = 0xe7,
CMDWD = 0xf0,
INFOWD = 0xf1,
TVSTNDWR = 0xf2,
TVSTNDRD = 0xf3
};
enum subaddr_t : u8;
enum fpaddr_t : u16;
u8 m_ifc;
u8 m_afend;

2
src/mame/rm/rm380z_m.cpp
View file

@ -375,7 +375,7 @@ void rm380z_state::config_memory_map()
{
address_space &program = m_maincpu->space(AS_PROGRAM);
uint8_t *rom = memregion(RM380Z_MAINCPU_TAG)->base();
uint8_t* m_ram_p = m_messram->pointer();
uint8_t *m_ram_p = m_messram->pointer();
if (ports_enabled_high())
{

4
src/mame/rm/rm380z_v.cpp
View file

@ -87,7 +87,7 @@ int rm380z_state_cos40_hrg::calculate_hrg_vram_index(offs_t offset) const
return index;
}
bool rm380z_state::get_rowcol_from_offset(int& row, int& col, offs_t offset) const
bool rm380z_state::get_rowcol_from_offset(int &row, int &col, offs_t offset) const
{
col = offset & 0x3f; // the 6 least significant bits give the column (0-39)
row = offset >> 6; // next 5 bits give the row (0-23)
@ -95,7 +95,7 @@ bool rm380z_state::get_rowcol_from_offset(int& row, int& col, offs_t offset) con
return ((row < RM380Z_SCREENROWS) && (col < RM380Z_SCREENCOLS));
}
bool rm380z_state_cos40::get_rowcol_from_offset(int& row, int& col, offs_t offset) const
bool rm380z_state_cos40::get_rowcol_from_offset(int &row, int &col, offs_t offset) const
{
if (m_videomode == RM380Z_VIDEOMODE_80COL)
{

4
src/mame/rm/rm480z_m.cpp
View file

@ -51,7 +51,7 @@ void rm480z_state::control_port_write(offs_t offset, uint8_t data)
case 0:
{
const int bank = (offset & 0x0300) >> 8;
uint8_t* ram = m_ram->pointer();
uint8_t *ram = m_ram->pointer();
m_bank[bank]->set_base(ram + 0x4000 * (data & 0x0f));
break;
}
@ -223,7 +223,7 @@ void rm480z_state::hrg_port_write(offs_t offset, uint8_t data)
void rm480z_state::machine_reset()
{
uint8_t* mem = m_ram->pointer();
uint8_t *mem = m_ram->pointer();
m_vram.reset();
memset(m_hrg_ram, 0, sizeof(m_hrg_ram));

16
src/mame/rm/rm_mq2.cpp
View file

@ -124,14 +124,14 @@ void rmMQ2_device::device_add_mconfig(machine_config &config)
//-------------------------------------------------
rmMQ2_device::rmMQ2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, RM_MQ2, tag, owner, clock),
device_rs232_port_interface(mconfig, *this),
m_maincpu(*this, "maincpu"),
m_ctc(*this, "ctc"),
m_sio(*this, "sio"),
m_fdc(*this, "wd1793"),
m_floppy0(*this, "wd1793:0"),
m_floppy1(*this, "wd1793:1")
device_t(mconfig, RM_MQ2, tag, owner, clock),
device_rs232_port_interface(mconfig, *this),
m_maincpu(*this, "maincpu"),
m_ctc(*this, "ctc"),
m_sio(*this, "sio"),
m_fdc(*this, "wd1793"),
m_floppy0(*this, "wd1793:0"),
m_floppy1(*this, "wd1793:1")
{
}

6
src/mame/rm/rm_mq2.h
View file

@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Robin Sergeant
#ifndef MAME_BUS_RM_MQ2_H
#define MAME_BUS_RM_MQ2_H
#ifndef MAME_RM_RM_MQ2_H
#define MAME_RM_RM_MQ2_H
#pragma once
@ -50,4 +50,4 @@ private:
DECLARE_DEVICE_TYPE(RM_MQ2, rmMQ2_device)
#endif // MAME_BUS_RM_MQ2_H
#endif // MAME_RM_RM_MQ2_H