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hitachi/bml3.cpp: IG RAM initial support for bml3mk5, adhere to official naming for System I/O fns
This commit is contained in:
angelosa
parent
79f85a600a
commit
23fdf3efaa
1 changed files with 176 additions and 96 deletions
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@ -11,10 +11,13 @@ References:
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- https://github.com/bml3mk5/EmuB-6892/blob/master/src/docs/spec.txt
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TODO:
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- bml3mk5: complete IG RAM support;
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- keyboard break NMI (as per bmjr);
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- Cassette relay doesn't work properly, issuing a LOAD won't autostart a load;
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- Cassette baud rate bump (can switch from 600 to 1200 bauds thru $ffd7);
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- implement sound as a bml3bus slot device;
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- account for hardware differences between MB-6890, MB-6891 and MB-6892
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(e.g. custom font support on the MB-6892)
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- Verify if anything needs composing from here for Hitachi MB-S1 support;
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- soft reset will hang the machine;
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- Hitachi MB-S1 support (bumps memory map, adds an extra I/O layer);
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**************************************************************************************************/
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@ -104,13 +107,15 @@ public:
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DECLARE_INPUT_CHANGED_MEMBER(nmi_button);
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protected:
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// NOTE: need to override for S1 support, later on
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virtual void main_map(address_map &map);
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void system_io(address_map &map);
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virtual void system_io(address_map &map);
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virtual void machine_start() override;
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virtual void machine_reset() override;
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private:
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required_device<cpu_device> m_maincpu;
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required_device<bml3bus_device> m_bml3bus;
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private:
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required_region_ptr<u8> m_p_chargen;
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required_device<mc6845_device> m_crtc;
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required_device<cassette_image_device> m_cassette;
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@ -129,23 +134,23 @@ private:
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uint8_t mc6845_r(offs_t offset);
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void mc6845_w(offs_t offset, u8 data);
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uint8_t keyboard_r();
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void keyboard_w(u8 data);
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void hres_reg_w(u8 data);
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void vres_reg_w(u8 data);
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uint8_t kb_sel_r();
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void kb_sel_w(u8 data);
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void mode_sel_w(u8 data);
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void interlace_sel_w(u8 data);
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uint8_t vram_r(offs_t offset);
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void vram_w(offs_t offset, u8 data);
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[[maybe_unused]] uint8_t psg_latch_r();
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[[maybe_unused]] void psg_latch_w(u8 data);
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uint8_t vram_attr_r();
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void vram_attr_w(u8 data);
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uint8_t beep_r();
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void beep_w(u8 data);
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uint8_t c_reg_sel_r();
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void c_reg_sel_w(u8 data);
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uint8_t music_sel_r();
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void music_sel_w(u8 data);
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void piaA_w(uint8_t data);
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uint8_t keyb_nmi_r();
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void firq_mask_w(u8 data);
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uint8_t firq_status_r();
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void relay_w(u8 data);
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uint8_t kbnmi_r();
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void time_mask_w(u8 data);
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uint8_t timer_r();
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void remote_w(u8 data);
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void acia_rts_w(int state);
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void acia_irq_w(int state);
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@ -175,8 +180,6 @@ private:
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bool m_cassbit = 0;
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bool m_cassold = 0;
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u8 m_cass_data[4]{};
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virtual void machine_reset() override;
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virtual void machine_start() override;
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void crtc_change_clock(u8 setting);
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u8 m_crtc_index = 0U;
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std::unique_ptr<u8[]> m_vram;
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@ -201,9 +204,24 @@ class bml3mk5_state : public bml3mk2_state
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public:
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bml3mk5_state(const machine_config &mconfig, device_type type, const char *tag)
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: bml3mk2_state(mconfig, type, tag)
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, m_ig_view(*this, "ig_view")
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, m_gfxdecode(*this, "gfxdecode")
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{ }
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void bml3mk5(machine_config &config);
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protected:
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virtual void main_map(address_map &map) override;
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virtual void system_io(address_map &map) override;
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virtual void machine_start() override;
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virtual void machine_reset() override;
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private:
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memory_view m_ig_view;
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required_device<gfxdecode_device> m_gfxdecode;
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std::unique_ptr<u8[]> m_ig_ram;
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void ig_ram_w(offs_t offset, u8 data);
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u8 m_igen = 0;
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};
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MC6845_UPDATE_ROW( bml3_state::crtc_update_row )
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@ -314,7 +332,7 @@ void bml3_state::mc6845_w(offs_t offset, u8 data)
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}
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}
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u8 bml3_state::keyboard_r()
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u8 bml3_state::kb_sel_r()
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{
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m_maincpu->set_input_line(M6809_IRQ_LINE, CLEAR_LINE);
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u8 ret = m_keyb_scancode;
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@ -323,7 +341,8 @@ u8 bml3_state::keyboard_r()
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return ret;
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}
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void bml3_state::keyboard_w(u8 data)
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// KB SEL - Keyboard mode register, interrupt control, keyboard LEDs
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void bml3_state::kb_sel_w(u8 data)
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{
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m_keyb_katakana_led_on = BIT(data, 0);
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m_keyb_hiragana_led_on = BIT(data, 1);
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@ -348,27 +367,24 @@ void bml3_state::crtc_change_clock(u8 setting)
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m_crtc->set_unscaled_clock(m6845_clock);
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}
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void bml3_state::hres_reg_w(u8 data)
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/*
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* MODE_SEL - Graphics mode select
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* cfr. see service manual p.43
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* x--- ---- "W" bit: 0 = 40 columns, 1 = 80 columns
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* -x-- ---- "HR" bit: 0 = high resolution, 1 = normal
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* --x- ---- "C" bit - ACIA mode: 0 = cassette, 1 = RS-232C
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* ---- -RGB Background colour
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*/
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void bml3_state::mode_sel_w(u8 data)
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{
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// MODE SEL register (see service manual p.43).
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/*
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x--- ---- "W" bit: 0 = 40 columns, 1 = 80 columns
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-x-- ---- "HR" bit: 0 = high resolution, 1 = normal
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--x- ---- "C" bit - ACIA mode: 0 = cassette, 1 = RS-232C
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---- -RGB Background colour
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*/
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m_hres_reg = data;
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crtc_change_clock((m_hres_reg & 0x80) | (m_vres_reg & 0x08));
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}
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void bml3_state::vres_reg_w(u8 data)
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// INTERLACE_SEL - Interlaced video mode
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void bml3_state::interlace_sel_w(u8 data)
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{
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// The MB-6890 had an interlaced video mode which was used for displaying Japanese (Hiragana and Katakana) text (8x16 character glyph bitmaps).
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/*
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---- x--- Interlace select: 0 = non-interlace, 1 = interlace
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*/
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m_vres_reg = data;
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crtc_change_clock((m_hres_reg & 0x80) | (m_vres_reg & 0x08));
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@ -378,7 +394,7 @@ void bml3_state::vres_reg_w(u8 data)
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u8 bml3_state::vram_r(offs_t offset)
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{
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// Bit 7 masks reading back to the latch
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if (!BIT(m_attr_latch, 7))
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if (!BIT(m_attr_latch, 7) && !machine().side_effects_disabled())
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m_attr_latch = m_aram[offset];
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return m_vram[offset];
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@ -415,49 +431,56 @@ void bml3_state::ym2203_w(u8 data)
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m_ym2203->write(dev_offs, data);
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}
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u8 bml3_state::vram_attr_r()
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/*
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* C-REG-SELECT register
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* Reads from a VRAM address copy the corresponding 'colour RAM' address to the
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* low-order 5 bits of this register as a side-effect
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*/
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u8 bml3_state::c_reg_sel_r()
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{
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// C-REG-SELECT register
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// Reads from a VRAM address copy the corresponding 'colour RAM' address to the low-order 5 bits of this register as a side-effect
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// (unless MK bit indicates 'prohibit write')
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return m_attr_latch;
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}
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void bml3_state::vram_attr_w(u8 data)
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/*
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* C_REG_SEL - Attribute register (character/video mode and colours)
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* Writes to a VRAM address copy the low-order 5 bits of this register to the corresponding 'colour RAM' address as a side-effect
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* x--- ---- "MK" bit: 0 = enable write, 1 = prohibit write
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* ---x ---- "GC" bit: 0 = character, 1 = graphic
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* ---- x--- "RV" bit: 0 = normal, 1 - reverse
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* ---- -RGB Foreground colour
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*
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*/
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void bml3_state::c_reg_sel_w(u8 data)
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{
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// C-REG-SELECT register
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// Writes to a VRAM address copy the low-order 5 bits of this register to the corresponding 'colour RAM' address as a side-effect
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/*
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x--- ---- "MK" bit: 0 = enable write, 1 = prohibit write
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---x ---- "GC" bit: 0 = character, 1 = graphic
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---- x--- "RV" bit: 0 = normal, 1 - reverse
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---- -RGB Foreground colour
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*/
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m_attr_latch = data;
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}
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u8 bml3_state::beep_r()
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u8 bml3_state::music_sel_r()
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{
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return -1; // BEEP status read?
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}
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void bml3_state::beep_w(u8 data)
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// MUSIC SEL - Music select: toggle audio output level when rising
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void bml3_state::music_sel_w(u8 data)
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{
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m_speaker->level_w(BIT(data, 7));
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}
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void bml3_state::relay_w(u8 data)
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// REMOTE - Remote relay control for cassette - bit 7
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void bml3_state::remote_w(u8 data)
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{
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m_cassette->change_state(
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BIT(data,7) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
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BIT(data, 7) ? CASSETTE_MOTOR_ENABLED : CASSETTE_MOTOR_DISABLED, CASSETTE_MASK_MOTOR);
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}
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u8 bml3_state::keyb_nmi_r()
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// KBNMI - Keyboard "Break" key non-maskable interrupt
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u8 bml3_state::kbnmi_r()
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{
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return m_nmi; // bit 7 used to signal a BREAK key pressure
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}
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void bml3_state::firq_mask_w(u8 data)
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// TIME_MASK - Prohibit timer IRQ
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void bml3_state::time_mask_w(u8 data)
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{
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m_firq_mask = data & 0x80;
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if(m_firq_mask)
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@ -467,11 +490,15 @@ void bml3_state::firq_mask_w(u8 data)
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}
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}
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u8 bml3_state::firq_status_r()
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// TIMER - System timer enable
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u8 bml3_state::timer_r()
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{
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u8 res = m_firq_status << 7;
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m_firq_status = 0;
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m_maincpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE);
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if (!machine().side_effects_disabled())
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{
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m_firq_status = 0;
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m_maincpu->set_input_line(M6809_FIRQ_LINE, CLEAR_LINE);
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}
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return res;
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}
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@ -511,33 +538,20 @@ void bml3_state::system_io(address_map &map)
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map(0x00c0, 0x00c3).rw("pia", FUNC(pia6821_device::read), FUNC(pia6821_device::write));
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map(0x00c4, 0x00c5).rw(m_acia, FUNC(acia6850_device::read), FUNC(acia6850_device::write));
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map(0x00c6, 0x00c7).rw(FUNC(bml3_state::mc6845_r), FUNC(bml3_state::mc6845_w));
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// KBNMI - Keyboard "Break" key non-maskable interrupt
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map(0x00c8, 0x00c8).r(FUNC(bml3_state::keyb_nmi_r)); // keyboard nmi
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// DIPSW - DIP switches on system mainboard
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map(0x00c9, 0x00c9).portr("DSW");
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// TIMER - System timer enable
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map(0x00ca, 0x00ca).r(FUNC(bml3_state::firq_status_r)); // timer irq
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// LPFLG - Light pen interrupt
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// map(0x00cb, 0x00cb)
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// MODE_SEL - Graphics mode select
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map(0x00d0, 0x00d0).w(FUNC(bml3_state::hres_reg_w));
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// TRACE - Trace counter
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// map(0x00d1, 0x00d1)
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// REMOTE - Remote relay control for cassette - bit 7
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map(0x00d2, 0x00d2).w(FUNC(bml3_state::relay_w));
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// MUSIC_SEL - Music select: toggle audio output level when rising
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map(0x00d3, 0x00d3).rw(FUNC(bml3_state::beep_r), FUNC(bml3_state::beep_w));
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// TIME_MASK - Prohibit timer IRQ
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map(0x00d4, 0x00d4).w(FUNC(bml3_state::firq_mask_w));
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// LPENBL - Light pen operation enable
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map(0x00d5, 0x00d5).noprw();
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// INTERLACE_SEL - Interlaced video mode (manual has "INTERACE SEL"!)
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map(0x00d6, 0x00d6).w(FUNC(bml3_state::vres_reg_w));
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// map(0x00d7, 0x00d7) baud select
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// C_REG_SEL - Attribute register (character/video mode and colours)
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map(0x00d8, 0x00d8).rw(FUNC(bml3_state::vram_attr_r), FUNC(bml3_state::vram_attr_w));
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// KB - Keyboard mode register, interrupt control, keyboard LEDs
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map(0x00e0, 0x00e0).rw(FUNC(bml3_state::keyboard_r), FUNC(bml3_state::keyboard_w));
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map(0x00c8, 0x00c8).r(FUNC(bml3_state::kbnmi_r));
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map(0x00c9, 0x00c9).portr("DIPSW");
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map(0x00ca, 0x00ca).r(FUNC(bml3_state::timer_r));
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// map(0x00cb, 0x00cb) LPFLG - Light pen interrupt
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map(0x00d0, 0x00d0).w(FUNC(bml3_state::mode_sel_w));
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// map(0x00d1, 0x00d1) TRACE - Trace counter
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map(0x00d2, 0x00d2).w(FUNC(bml3_state::remote_w));
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map(0x00d3, 0x00d3).rw(FUNC(bml3_state::music_sel_r), FUNC(bml3_state::music_sel_w));
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map(0x00d4, 0x00d4).w(FUNC(bml3_state::time_mask_w));
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map(0x00d5, 0x00d5).noprw(); // L/P ENBL - Light pen operation enable
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map(0x00d6, 0x00d6).w(FUNC(bml3_state::interlace_sel_w));
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// map(0x00d7, 0x00d7) BANK SEL - baud select
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map(0x00d8, 0x00d8).rw(FUNC(bml3_state::c_reg_sel_r), FUNC(bml3_state::c_reg_sel_w));
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map(0x00e0, 0x00e0).rw(FUNC(bml3_state::kb_sel_r), FUNC(bml3_state::kb_sel_w));
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// map(0x00e8, 0x00e8) bank register
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// map(0x00e9, 0x00e9) IG mode register
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// map(0x00ea, 0x00ea) IG enable register
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@ -548,9 +562,46 @@ void bml3_state::system_io(address_map &map)
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#endif
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}
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void bml3mk5_state::ig_ram_w(offs_t offset, u8 data)
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{
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for (int i = 0; i < 3; i++)
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{
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if (BIT(m_igen, i))
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m_ig_ram[offset + 0x800 * i] = data;
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}
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m_gfxdecode->gfx(0)->mark_dirty(offset / 8);
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}
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void bml3mk5_state::main_map(address_map &map)
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{
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bml3_state::main_map(map);
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map(0xa000, 0xa7ff).view(m_ig_view);
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m_ig_view[0](0xa000, 0xa7ff).writeonly().w(FUNC(bml3mk5_state::ig_ram_w));
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}
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void bml3mk5_state::system_io(address_map &map)
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{
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bml3_state::system_io(map);
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// IGMODREG
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map(0x00e9, 0x00e9).lw8(
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NAME([this] (u8 data) {
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if (BIT(data, 0))
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m_ig_view.select(0);
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else
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m_ig_view.disable();
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})
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);
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// IGENREG
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map(0x00ea, 0x00ea).lw8(
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NAME([this] (u8 data) {
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m_igen = data & 7;
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})
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);
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}
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INPUT_CHANGED_MEMBER(bml3_state::nmi_button)
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{
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// TODO: isn't this supposed to actually raise an NMI, just like earlier Basic Master LV1/2?
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// TODO: supposed to actually raise an NMI, just like earlier Basic Master LV1/2
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m_nmi = newval ? 0x80 : 0;
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}
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@ -558,7 +609,7 @@ static INPUT_PORTS_START( bml3 )
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// DIP switches (service manual p.88)
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// Note the NEWON command reboots with a soft override for the DIP switch
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PORT_START("DSW")
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PORT_START("DIPSW")
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PORT_DIPNAME( 0x01, 0x01, "BASIC/terminal mode")
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PORT_DIPSETTING(0x00, "Terminal mode")
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PORT_DIPSETTING(0x01, "BASIC mode")
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@ -755,13 +806,6 @@ TIMER_DEVICE_CALLBACK_MEMBER( bml3_state::kansas_r )
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}
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}
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#if 0
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INTERRUPT_GEN_MEMBER(bml3_state::irq)
|
||||
{
|
||||
m_maincpu->set_input_line(M6809_IRQ_LINE, HOLD_LINE);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
INTERRUPT_GEN_MEMBER(bml3_state::timer_firq)
|
||||
{
|
||||
|
|
@ -777,6 +821,9 @@ void bml3_state::machine_start()
|
|||
m_vram = make_unique_clear<u8[]>(0x4000);
|
||||
m_aram = make_unique_clear<u8[]>(0x4000);
|
||||
|
||||
// TODO: this setup is goofy, and bound to fail if things changes downstream.
|
||||
// Should really overlay the ROM region, not the view itself.
|
||||
// Additionally each slot has separate ROM KIL and EXROM KIL signal controls ...
|
||||
m_bml3bus->map_exrom(m_rom_view[0]);
|
||||
m_bml3bus->map_io(m_maincpu->space(AS_PROGRAM));
|
||||
|
||||
|
|
@ -836,6 +883,22 @@ void bml3_state::machine_reset()
|
|||
m_kbt = 0;
|
||||
}
|
||||
|
||||
void bml3mk5_state::machine_start()
|
||||
{
|
||||
bml3_state::machine_start();
|
||||
m_ig_ram = make_unique_clear<u8[]>(0x800 * 3);
|
||||
m_gfxdecode->gfx(0)->set_source_and_total(m_ig_ram.get(), 0x100);
|
||||
|
||||
save_pointer(NAME(m_ig_ram), 0x800 * 3);
|
||||
}
|
||||
|
||||
void bml3mk5_state::machine_reset()
|
||||
{
|
||||
bml3_state::machine_reset();
|
||||
m_ig_view.disable();
|
||||
m_igen = 0;
|
||||
}
|
||||
|
||||
void bml3_state::piaA_w(uint8_t data)
|
||||
{
|
||||
/* ROM banking:
|
||||
|
|
@ -914,6 +977,23 @@ TIMER_DEVICE_CALLBACK_MEMBER( bml3_state::kansas_w )
|
|||
m_cassette->output(BIT(m_cass_data[3], 1) ? -1.0 : +1.0); // 1200Hz
|
||||
}
|
||||
|
||||
// Debugging only
|
||||
static const gfx_layout ig_charlayout =
|
||||
{
|
||||
8, 8,
|
||||
RGN_FRAC(1,3),
|
||||
3,
|
||||
{ RGN_FRAC(0, 3), RGN_FRAC(1, 3), RGN_FRAC(2, 3) },
|
||||
{ STEP8(0, 1) },
|
||||
{ STEP8(0, 8) },
|
||||
8*8
|
||||
};
|
||||
|
||||
static GFXDECODE_START( gfx_bml3mk5 )
|
||||
GFXDECODE_ENTRY( nullptr, 0x1800, ig_charlayout, 0, 1 )
|
||||
GFXDECODE_END
|
||||
|
||||
|
||||
static void bml3_cards(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("mp1802", BML3BUS_MP1802);
|
||||
|
|
@ -922,7 +1002,6 @@ static void bml3_cards(device_slot_interface &device)
|
|||
device.option_add("rtc", BML3BUS_RTC);
|
||||
}
|
||||
|
||||
|
||||
void bml3_state::bml3(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
|
|
@ -1011,6 +1090,7 @@ void bml3mk5_state::bml3mk5(machine_config &config)
|
|||
{
|
||||
bml3mk2_state::bml3mk2(config);
|
||||
// TODO: override bus defaults
|
||||
GFXDECODE(config, "gfxdecode", "palette", gfx_bml3mk5);
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue