diff --git a/cta.c b/cta.c index 3f99328..7b8109f 100644 --- a/cta.c +++ b/cta.c @@ -107,6 +107,97 @@ parse_video_block(struct di_edid_cta *cta, struct di_cta_video_block *video, return true; } +static bool +parse_vendor_hdmi_forum_block(struct di_edid_cta *cta, + struct di_cta_vendor_hdmi_forum_block_priv *priv, + const uint8_t *data, size_t size) +{ + const ssize_t offset = -1; /* Spec gives offset relative to header */ + const char block_name[] = "Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8"; + struct di_cta_vendor_hdmi_forum_block *block = &priv->base; + uint8_t max_frl_rate; + + /* TODO: check size */ + + block->version = data[4 + offset]; + if (block->version != 1) { + add_failure(cta, "%s: Unsupported version %d.", block_name, block->version); + return false; + } + + block->max_tmds_char_rate_mhz = 5 * data[5 + offset]; + if (block->max_tmds_char_rate_mhz > 0 && block->max_tmds_char_rate_mhz <= 340) { + add_failure(cta, "%s: Max TMDS rate is > 0 and <= 340.", block_name); + block->max_tmds_char_rate_mhz = 0; + } + + block->supports_3d_osd_disparity = has_bit(data[6 + offset], 0); + block->supports_3d_dial_view = has_bit(data[6 + offset], 1); + block->supports_3d_independent_view = has_bit(data[6 + offset], 2); + block->supports_lte_340mcsc_scramble = has_bit(data[6 + offset], 3); + block->supports_ccbpci = has_bit(data[6 + offset], 4); + block->supports_scdc_read_request = has_bit(data[6 + offset], 6); + block->supports_scdc = has_bit(data[6 + offset], 7); + if (has_bit(data[6 + offset], 5)) + add_failure(cta, "%s: Bit 5 of byte 6 is reserved.", block_name); + + block->supports_dc_30bit_420 = has_bit(data[7 + offset], 0); + block->supports_dc_36bit_420 = has_bit(data[7 + offset], 1); + block->supports_dc_48bit_420 = has_bit(data[7 + offset], 2); + if (has_bit(data[7 + offset], 3)) + add_failure(cta, "%s: Bit 3 of byte 7 is reserved.", block_name); + + max_frl_rate = get_bit_range(data[7 + offset], 7, 4); + if (max_frl_rate != 0) { + block->frl = &priv->frl; + priv->frl.supports_3gbps_3lanes = max_frl_rate >= 1; + priv->frl.supports_6gbps_3lanes = max_frl_rate >= 2; + priv->frl.supports_6gbps_4lanes = max_frl_rate >= 3; + priv->frl.supports_8gbps_4lanes = max_frl_rate >= 4; + priv->frl.supports_10gbps_4lanes = max_frl_rate >= 5; + priv->frl.supports_12gbps_4lanes = max_frl_rate >= 6; + if (max_frl_rate >= 7) + add_failure(cta, "%s: Unknown Max Fixed Rate Link (0x%02x).", block_name, max_frl_rate); + if (max_frl_rate == 1 && block->max_tmds_char_rate_mhz < 300) + add_failure(cta, "%s: Max Fixed Rate Link is 1, but Max TMDS rate < 300.", block_name); + if (max_frl_rate >= 2 && block->max_tmds_char_rate_mhz != 600) + add_failure(cta, "%s: Max Fixed Rate Link is >= 2, but Max TMDS rate != 600.", block_name); + } + + block->supports_fapa_start_location = has_bit(data[8 + offset], 0); + block->supports_allm = has_bit(data[8 + offset], 1); + block->supports_fva = has_bit(data[8 + offset], 2); + block->supports_cnmvrr = has_bit(data[8 + offset], 3); + block->supports_cinema_vrr = has_bit(data[8 + offset], 4); + block->m_delta = has_bit(data[8 + offset], 5); + if (get_bit_range(data[8 + offset], 7, 6) != 0) + add_failure(cta, "%s: Bits 6 and 7 of byte 8 are reserved.", block_name); + + block->vrr_min_hz = get_bit_range(data[9 + offset], 5, 0); + block->vrr_max_hz = (get_bit_range(data[9 + offset], 7, 6) << 8) | data[10 + offset]; + + if (has_bit(data[11 + offset], 7)) { + block->dsc = &priv->dsc; + priv->dsc.supports_10bpc = has_bit(data[11 + offset], 0); + priv->dsc.supports_12bpc = has_bit(data[11 + offset], 1); + priv->dsc.supports_all_bpc = has_bit(data[11 + offset], 3); + priv->dsc.supports_native_420 = has_bit(data[11 + offset], 6); + if (has_bit(data[11 + offset], 2)) + add_failure(cta, "%s: DSC_16bpc bit is reserved.", block_name); + if (get_bit_range(data[11 + offset], 5, 4) != 0) + add_failure(cta, "%s: Bits 4 and 5 of byte 11 are reserved.", block_name); + priv->dsc.max_slices = get_bit_range(data[12 + offset], 3, 0); + priv->dsc.max_frl_rate_gbps = get_bit_range(data[12 + offset], 7, 4); + priv->dsc.max_total_chunk_bytes = get_bit_range(data[13 + offset], 5, 0); + if (get_bit_range(data[13 + offset], 7, 6) != 0) + add_failure(cta, "%s: Bits 6 and 7 of byte 13 are reserved.", block_name); + } + + /* TODO: all other bytes are reserved */ + + return true; +} + static bool parse_ycbcr420_block(struct di_edid_cta *cta, struct di_cta_video_block *ycbcr420, @@ -1258,6 +1349,7 @@ parse_data_block(struct di_edid_cta *cta, uint8_t raw_tag, const uint8_t *data, enum di_cta_data_block_tag tag; uint8_t extended_tag; struct di_cta_data_block *data_block; + uint32_t ieee_oui; data_block = calloc(1, sizeof(*data_block)); if (!data_block) { @@ -1277,7 +1369,26 @@ parse_data_block(struct di_edid_cta *cta, uint8_t raw_tag, const uint8_t *data, break; case 3: /* Vendor-Specific Data Block */ - goto skip; + + if (size < 3) { + add_failure(cta, + "Vendor-Specific Data Block: Data block length (%zu) is not enough to contain an OUI.", + size); + goto skip; + } + + ieee_oui = (data[2] << 16) | (data[1] << 8) | data[0]; + switch (ieee_oui) { + case IEEE_OUI_HDMI_FORUM: + tag = DI_CTA_DATA_BLOCK_VENDOR_HDMI_FORUM; + if (!parse_vendor_hdmi_forum_block(cta, &data_block->vendor_hdmi_forum, + data, size)) + goto skip; + break; + default: + goto skip; + } + break; case 4: tag = DI_CTA_DATA_BLOCK_SPEAKER_ALLOC; if (!parse_speaker_alloc_block(cta, &data_block->speaker_alloc, diff --git a/di-edid-decode/cta.c b/di-edid-decode/cta.c index d0c7021..3825e97 100644 --- a/di-edid-decode/cta.c +++ b/di-edid-decode/cta.c @@ -752,6 +752,8 @@ cta_data_block_tag_name(enum di_cta_data_block_tag tag) return "HDMI Forum EDID Extension Override Data Block"; case DI_CTA_DATA_BLOCK_HDMI_SINK_CAP: return "HDMI Forum Sink Capability Data Block"; + case DI_CTA_DATA_BLOCK_VENDOR_HDMI_FORUM: + return "Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8"; } return "Unknown CTA-861 Data Block"; } diff --git a/include/cta.h b/include/cta.h index fc57735..a963f24 100644 --- a/include/cta.h +++ b/include/cta.h @@ -58,6 +58,8 @@ */ #define EDID_CTA_INFOFRAME_BLOCK_ENTRIES 61 +#define IEEE_OUI_HDMI_FORUM 0xC45DD8 + struct di_edid_cta { int revision; struct di_edid_cta_flags flags; @@ -128,6 +130,12 @@ struct di_cta_infoframe_block_priv { size_t infoframes_len; }; +struct di_cta_vendor_hdmi_forum_block_priv { + struct di_cta_vendor_hdmi_forum_block base; + struct di_cta_vendor_hdmi_forum_block_frl frl; + struct di_cta_vendor_hdmi_forum_block_dsc dsc; +}; + struct di_cta_data_block { enum di_cta_data_block_tag tag; @@ -155,6 +163,8 @@ struct di_cta_data_block { struct di_cta_ycbcr420_cap_map ycbcr420_cap_map; /* Used for DI_CTA_DATA_BLOCK_INFOFRAME */ struct di_cta_infoframe_block_priv infoframe; + /* Used for DI_CTA_DATA_BLOCK_VENDOR_HDMI_FORUM */ + struct di_cta_vendor_hdmi_forum_block_priv vendor_hdmi_forum; }; extern const struct di_cta_video_format _di_cta_video_formats[]; diff --git a/include/libdisplay-info/cta.h b/include/libdisplay-info/cta.h index 18459c5..2616466 100644 --- a/include/libdisplay-info/cta.h +++ b/include/libdisplay-info/cta.h @@ -165,6 +165,9 @@ enum di_cta_data_block_tag { DI_CTA_DATA_BLOCK_HDMI_EDID_EXT_OVERRIDE, /* HDMI Forum Sink Capability Data Block */ DI_CTA_DATA_BLOCK_HDMI_SINK_CAP, + + /* HDMI Forum Vendor-Specific Data Block */ + DI_CTA_DATA_BLOCK_VENDOR_HDMI_FORUM = 0x1000, }; /** @@ -924,6 +927,107 @@ struct di_cta_infoframe_block { const struct di_cta_infoframe_block * di_cta_data_block_get_infoframe(const struct di_cta_data_block *block); +/** + * Fixed Rate Link (FRL) support. + */ +struct di_cta_vendor_hdmi_forum_block_frl { + bool supports_3gbps_3lanes; /* 3 Gbit/s per lane on 3 lanes */ + bool supports_6gbps_3lanes; /* 6 Gbit/s per lane on 3 lanes */ + bool supports_6gbps_4lanes; /* 6 Gbit/s per lane on 4 lanes */ + bool supports_8gbps_4lanes; /* 8 Gbit/s per lane on 4 lanes */ + bool supports_10gbps_4lanes; /* 10 Gbit/s per lane on 4 lanes */ + bool supports_12gbps_4lanes; /* 12 Gbit/s per lane on 4 lanes */ +}; + +/** + * Display Stream Compression (DSC) support. + */ +struct di_cta_vendor_hdmi_forum_block_dsc { + /* Supports Display Stream Compression for 10bpc */ + bool supports_10bpc; + /* Supports Display Stream Compression for 12bpc */ + bool supports_12bpc; + /* Supports Display Stream Compression for any bpc between 1 and 16 */ + bool supports_all_bpc; + /* Supports Display Stream Compression for 4:2:0 pixel encodings */ + bool supports_native_420; + /* Maximum number of horizontal slices, zero if unsupported */ + int max_slices; + /* Maximum FRL_Rate in Gbit/s, zero if unsupported */ + int max_frl_rate_gbps; + /* Maximum total number of bytes in a line of chunks, zero if + * unsupported */ + int max_total_chunk_bytes; +}; + +/** + * HDMI Forum vendor-specific data block. + * + * This block is defined in HDMI 2.1 section 10.3.2. + */ +struct di_cta_vendor_hdmi_forum_block { + /* Version */ + int version; + /* Maximum TMDS character rate in MHz, zero if unset */ + int max_tmds_char_rate_mhz; + /* Supports 3D OSD disparity indication in HF-VSIF */ + bool supports_3d_osd_disparity; + /* Supports 3D dual view signaling in HF-VSIF */ + bool supports_3d_dial_view; + /* Supports 3D independent view signaling in HF-VSIF */ + bool supports_3d_independent_view; + /* Supports scrambling for TMDS character rates at or below 340 Mcsc */ + bool supports_lte_340mcsc_scramble; + /* Supports Color Content Bits Per Component Indication */ + bool supports_ccbpci; + /* Supports SCDC read request initiation */ + bool supports_scdc_read_request; + /* Supports SCDC */ + bool supports_scdc; + /* Supports 10 bits per component deep color 4:2:0 pixel encoding */ + bool supports_dc_30bit_420; + /* Supports 12 bits per component deep color 4:2:0 pixel encoding */ + bool supports_dc_36bit_420; + /* Supports 16 bits per component deep color 4:2:0 pixel encoding */ + bool supports_dc_48bit_420; + /* Fixed Rate Link (FRL) support, NULL if unsupported */ + const struct di_cta_vendor_hdmi_forum_block_frl *frl; + /* Supports FAPA beginning on the first horizontal Blank Pixel + * immediately following the first Active Video Pixel of a video + * frame/field */ + bool supports_fapa_start_location; + /* Supports Auto Low-Latency Mode */ + bool supports_allm; + /* Supports Fast VActive */ + bool supports_fva; + /* Supports negative M_VRR values when VRR and FVA are enabled */ + bool supports_cnmvrr; + /* Supports fractional and integer media rates that lie below the + * specified VRR_MIN when VRR is enabled and M_CONST is in use */ + bool supports_cinema_vrr; + /* Has a limit on rate-of-change variations in M_VRR values */ + bool m_delta; + /* Lowest frame rate in Hz for Variable Refresh Rate, zero if VRR is + * not supported */ + int vrr_min_hz; + /* Highest frame rate in Hz for Variable Refresh Rate, zero if unset */ + int vrr_max_hz; + /* Display Stream Compression (DSC) support, NULL if VESA DSC 1.2a is + * unsupported */ + const struct di_cta_vendor_hdmi_forum_block_dsc *dsc; +}; + +/** + * Get the vendor-specific HDMI Forum information from a CTA data block. + * + * Note, the HDMI and HDMI Forum vendor-specific data blocks are different. + * + * Returns NULL if the data block tag is not + * DI_CTA_DATA_BLOCK_VENDOR_HDMI_FORUM. + */ +const struct di_cta_vendor_hdmi_forum_block * +di_cta_data_block_get_vendor_hdmi_forum(const struct di_cta_data_block *block); + /** * Get a list of EDID detailed timing definitions. * diff --git a/test/data/cta-timings.diff b/test/data/cta-timings.diff index c489a2d..05523c3 100644 --- a/test/data/cta-timings.diff +++ b/test/data/cta-timings.diff @@ -9,7 +9,7 @@ Checksum: 0x0c ---------------- -@@ -88,21 +86,6 @@ +@@ -88,21 +86,7 @@ Max channels: 2 Supported sample rates (kHz): 48 44.1 32 Supported sample sizes (bits): 24 20 16 @@ -23,7 +23,7 @@ - HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz - HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz - HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz -- Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: + Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: - Version: 1 - Maximum TMDS Character Rate: 600 MHz - SCDC Present @@ -31,7 +31,7 @@ Video Capability Data Block: YCbCr quantization: Selectable (via AVI YQ) RGB quantization: Selectable (via AVI Q) -@@ -110,31 +93,15 @@ +@@ -110,31 +94,15 @@ IT scan behavior: Always Underscanned CE scan behavior: Always Underscanned Video Format Preference Data Block: @@ -63,7 +63,7 @@ Detailed Timing Descriptors: DTD 2: 3840x2160 59.996625 Hz 16:9 133.312 kHz 533.250000 MHz (960 mm x 540 mm) Hfront 48 Hsync 32 Hback 80 Hpol P -@@ -152,9 +119,9 @@ +@@ -152,10 +120,17 @@ Native detailed modes: 1 Detailed Timing Descriptors: DTD 3: 1280x720 59.855126 Hz 16:9 44.772 kHz 74.500000 MHz (analog composite, sync-on-green, 960 mm x 540 mm) @@ -76,3 +76,12 @@ ---------------- +-EDID conformity: PASS ++Failures: ++ ++Block 2, CTA-861 Extension Block: ++ Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Bit 3 of byte 7 is reserved. ++ Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Bits 6 and 7 of byte 8 are reserved. ++ Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Bits 4 and 5 of byte 11 are reserved. ++ Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Bits 6 and 7 of byte 13 are reserved. ++EDID conformity: FAIL diff --git a/test/data/dell-g3223q.diff b/test/data/dell-g3223q.diff index f04d99e..3a22768 100644 --- a/test/data/dell-g3223q.diff +++ b/test/data/dell-g3223q.diff @@ -9,7 +9,7 @@ Checksum: 0x9e ---------------- -@@ -84,53 +82,11 @@ +@@ -84,53 +82,12 @@ Supported sample sizes (bits): 24 20 16 Speaker Allocation Data Block: FL/FR - Front Left/Right @@ -24,7 +24,7 @@ - HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz - HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz - HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz -- Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: + Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: - Version: 1 - Maximum TMDS Character Rate: 600 MHz - SCDC Present @@ -63,7 +63,7 @@ HDR Static Metadata Data Block: Electro optical transfer functions: Traditional gamma - SDR luminance range -@@ -159,13 +115,12 @@ +@@ -159,13 +116,12 @@ DTD 3: 2560x1440 119.997589 Hz 16:9 182.996 kHz 497.750000 MHz (708 mm x 399 mm) Hfront 48 Hsync 32 Hback 80 Hpol P Vfront 3 Vsync 5 Vback 77 Vpol P @@ -78,7 +78,7 @@ Display Product Type: Standalone display device Video Timing Modes Type 1 - Detailed Timings Data Block: DTD: 3840x2160 143.962777 Hz 16:9 318.878 kHz 1250.000000 MHz (aspect 16:9, no 3D stereo) -@@ -183,30 +138,13 @@ +@@ -183,30 +139,13 @@ DTD: 2560x1440 59.950550 Hz 16:9 88.787 kHz 241.500000 MHz (aspect 16:9, no 3D stereo) Hfront 48 Hsync 32 Hback 80 Hpol P Vfront 3 Vsync 5 Vback 33 Vpol N diff --git a/test/data/hitachi-55r6+.diff b/test/data/hitachi-55r6+.diff index a53883b..a2d6936 100644 --- a/test/data/hitachi-55r6+.diff +++ b/test/data/hitachi-55r6+.diff @@ -1,6 +1,6 @@ --- ref +++ di -@@ -102,26 +102,6 @@ +@@ -102,26 +102,7 @@ Colorimetry Data Block: BT2020YCC BT2020RGB @@ -17,7 +17,7 @@ - HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz - HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz - HDMI VIC 4: 4096x2160 24.000000 Hz 256:135 54.000 kHz 297.000000 MHz -- Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: + Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: - Version: 1 - Maximum TMDS Character Rate: 600 MHz - SCDC Present @@ -27,7 +27,7 @@ HDR Static Metadata Data Block: Electro optical transfer functions: Traditional gamma - SDR luminance range -@@ -129,23 +109,6 @@ +@@ -129,23 +110,6 @@ Hybrid Log-Gamma Supported static metadata descriptors: Static metadata type 1 @@ -51,7 +51,7 @@ YCbCr 4:2:0 Capability Map Data Block: VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz VIC 102: 4096x2160 60.000000 Hz 256:135 135.000 kHz 594.000000 MHz -@@ -156,22 +119,8 @@ +@@ -156,22 +120,8 @@ DTD 3: 1360x768 60.015162 Hz 85:48 47.712 kHz 85.500000 MHz Hfront 64 Hsync 112 Hback 256 Hpol P Vfront 3 Vsync 6 Vback 18 Vpol P diff --git a/test/data/msi-mag321curv-dp.diff b/test/data/msi-mag321curv-dp.diff index 0107cf8..1130f48 100644 --- a/test/data/msi-mag321curv-dp.diff +++ b/test/data/msi-mag321curv-dp.diff @@ -1,6 +1,6 @@ --- ref +++ di -@@ -97,30 +97,12 @@ +@@ -97,30 +97,13 @@ Supported sample sizes (bits): 24 20 16 Speaker Allocation Data Block: FL/FR - Front Left/Right @@ -15,7 +15,7 @@ - HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz - HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz - HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz -- Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: + Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: - Version: 1 - Maximum TMDS Character Rate: 600 MHz - SCDC Present @@ -31,7 +31,7 @@ YCbCr 4:2:0 Capability Map Data Block: VIC 97: 3840x2160 60.000000 Hz 16:9 135.000 kHz 594.000000 MHz VIC 96: 3840x2160 50.000000 Hz 16:9 112.500 kHz 594.000000 MHz -@@ -133,7 +115,6 @@ +@@ -133,7 +116,6 @@ Static metadata type 1 Desired content max luminance: 92 (366.802 cd/m^2) Desired content max frame-average luminance: 92 (366.802 cd/m^2) @@ -39,7 +39,7 @@ Detailed Timing Descriptors: DTD 2: 2560x1440 59.950550 Hz 16:9 88.787 kHz 241.500000 MHz (700 mm x 390 mm) Hfront 48 Hsync 32 Hback 80 Hpol P -@@ -144,28 +125,12 @@ +@@ -144,28 +126,13 @@ DTD 4: 1280x768 59.870228 Hz 5:3 47.776 kHz 79.500000 MHz (700 mm x 390 mm) Hfront 64 Hsync 128 Hback 192 Hpol N Vfront 3 Vsync 7 Vback 20 Vpol P @@ -68,5 +68,6 @@ - HDMI VIC Codes must have their CTA-861 VIC equivalents in the VSB. - Missing VCDB, needed for Set Selectable RGB Quantization to avoid interop issues. - ++ Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: Bits 6 and 7 of byte 8 are reserved. + Colorimetry Data Block: Reserved bits MD0-MD3 must be 0. EDID conformity: FAIL diff --git a/test/data/philips-ftv-490.diff b/test/data/philips-ftv-490.diff index aaefdfe..00a27ac 100644 --- a/test/data/philips-ftv-490.diff +++ b/test/data/philips-ftv-490.diff @@ -14,7 +14,7 @@ MAT (MLP): Max channels: 8 Supported sample rates (kHz): 48 -@@ -106,29 +103,9 @@ +@@ -106,29 +103,10 @@ Hash calculation not required for object audio PCM or channel-based PCM Speaker Allocation Data Block: FL/FR - Front Left/Right @@ -31,7 +31,7 @@ - HDMI VIC 1: 3840x2160 30.000000 Hz 16:9 67.500 kHz 297.000000 MHz - HDMI VIC 2: 3840x2160 25.000000 Hz 16:9 56.250 kHz 297.000000 MHz - HDMI VIC 3: 3840x2160 24.000000 Hz 16:9 54.000 kHz 297.000000 MHz -- Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: + Vendor-Specific Data Block (HDMI Forum), OUI C4-5D-D8: - Version: 1 - Maximum TMDS Character Rate: 600 MHz - SCDC Present @@ -45,7 +45,7 @@ PT scan behavior: No Data IT scan behavior: Always Underscanned CE scan behavior: Always Overscanned -@@ -148,42 +125,12 @@ +@@ -148,42 +126,12 @@ HDR Dynamic Metadata Data Block: HDR Dynamic Metadata Type 4 Version: 4