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edid: fix interlaced timing printing in DTDs

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Signed-off-by: Simon Ser <contact@emersion.fr>
This commit is contained in:
Simon Ser 2022-10-07 07:06:36 +02:00
parent 2ec42b3bd2
commit 823afd5c94
4 changed files with 10 additions and 3 deletions
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6
di-edid-decode.c
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@ -277,7 +277,11 @@ print_detailed_timing_def(const struct di_edid_detailed_timing_def *def)
hbl = def->horiz_blank - 2 * def->horiz_border;
vbl = def->vert_blank - 2 * def->vert_border;
horiz_total = def->horiz_video + hbl;
vert_total = def->vert_video + vbl;
if (def->interlaced)
vert_total = def->vert_video / 2 + def->vert_blank +
def->vert_sync_pulse + 0.5;
else
vert_total = def->vert_video + vbl;
refresh = (double) def->pixel_clock_hz / (horiz_total * vert_total);
horiz_freq_hz = (double) def->pixel_clock_hz / horiz_total;

3
edid.c
View file

@ -403,6 +403,9 @@ _di_edid_parse_detailed_timing_def(const uint8_t data[static EDID_BYTE_DESCRIPTO
flags = data[17];
def->interlaced = has_bit(flags, 7);
if (def->interlaced) {
def->vert_video *= 2;
}
stereo_hi = get_bit_range(flags, 6, 5);
stereo_lo = get_bit_range(flags, 0, 0);

2
test/data/goldstar-ite6604-hdmi.diff
View file

@ -84,7 +84,7 @@
Hfront 88 Hsync 44 Hback 148 Hpol P
Vfront 4 Vsync 5 Vback 36 Vpol P
- DTD 6: 1920x1080i 60.000000 Hz 16:9 33.750 kHz 74.250000 MHz (708 mm x 398 mm)
+ DTD 6: 1920x540 i 60.053381 Hz 32:9 33.750 kHz 74.250000 MHz (708 mm x 398 mm)
+ DTD 6: 1920x1080 i 60.053381 Hz 16:9 33.750 kHz 74.250000 MHz (708 mm x 398 mm)
Hfront 88 Hsync 44 Hback 148 Hpol P
- Vfront 2 Vsync 5 Vback 15 Vpol P Vfront +0.5 Odd Field
- Vfront 2 Vsync 5 Vback 15 Vpol P Vback +0.5 Even Field

2
test/data/viewsonic-vp2768-dp.diff
View file

@ -58,7 +58,7 @@
Hfront 88 Hsync 44 Hback 148 Hpol P
Vfront 4 Vsync 5 Vback 36 Vpol P
- DTD 3: 1920x1080i 60.000000 Hz 16:9 33.750 kHz 74.250000 MHz (597 mm x 336 mm)
+ DTD 3: 1920x540 i 60.053381 Hz 32:9 33.750 kHz 74.250000 MHz (597 mm x 336 mm)
+ DTD 3: 1920x1080 i 60.053381 Hz 16:9 33.750 kHz 74.250000 MHz (597 mm x 336 mm)
Hfront 88 Hsync 44 Hback 148 Hpol P
- Vfront 2 Vsync 5 Vback 15 Vpol P Vfront +0.5 Odd Field
- Vfront 2 Vsync 5 Vback 15 Vpol P Vback +0.5 Even Field