mirror of
https://github.com/sxpert/hp-saturn
synced 2025-01-19 10:26:58 +01:00
37 lines
No EOL
833 B
Verilog
37 lines
No EOL
833 B
Verilog
/******************************************************************************
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* B[ab]x
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*
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* lots of things there
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*
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*/
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`include "decstates.v"
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`include "fields.v"
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`DEC_Bxx_EXEC: begin
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if (!field_table[0]) begin
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if (!nb_in[3]) begin
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alu_reg_dest <= {2'b0, nb_in[1:0]};
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alu_reg_src1 <= {2'b0, nb_in[1:0]};
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if (!nb_in[2]) begin
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end else alu_op <= `ALU_OP_INC;
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end else begin
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$display("Bxx table 'a' not handled yet");
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decode_error <= 1;
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end
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end else begin
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alu_reg_dest <= {2'b0, nb_in[1:0]};
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$display("Bxx table 'b' not handled yet");
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decode_error <= 1;
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end
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alu_debug <= 1;
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next_cycle <= `BUSCMD_NOP;
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decstate <= `DEC_ALU_INIT;
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alu_return <= `DEC_START;
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`ifdef SIM
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`endif
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end |