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26 lines
507 B
Verilog
26 lines
507 B
Verilog
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/******************************************************************************
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* 80
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* a lot of things start with 80...
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*
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*/
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`include "decstates.v"
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`DEC_80X: begin
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case (nibble)
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4'h5: begin
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execute_cycle <= 1;
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decstate <= `DEC_CONFIG;
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end
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4'ha: begin
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execute_cycle <= 1;
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decstate <= `DEC_RESET;
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end
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4'hc: decstate <= `DEC_C_EQ_P_N;
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default: begin
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$display("ERROR : DEC_80X");
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decode_error <= 1;
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end
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endcase
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end
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