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https://github.com/sxpert/hp-saturn
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40 lines
1 KiB
Verilog
40 lines
1 KiB
Verilog
/******************************************************************************
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* Dx
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* register manipulation field A
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*
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*/
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`include "decstates.v"
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`DEC_DX: begin
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field <= `T_FIELD_A;
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alu_first <= 0;
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alu_last <= 4;
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case (nb_in[3:2])
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2'b00: begin
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alu_op <= `ALU_OP_ZERO;
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alu_reg_dest <= {2'b00, nb_in[1:0]};
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end
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2'b01: begin
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alu_op <= `ALU_OP_COPY;
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alu_reg_dest <= {2'b00, nb_in[1:0]};
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alu_reg_src1 <= {2'b00, nb_in[0], !(nb_in[1] || nb_in[0])};
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end
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2'b10: begin
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alu_op <= `ALU_OP_COPY;
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alu_reg_dest <= {2'b00, nb_in[0], !(nb_in[1] || nb_in[0])};
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alu_reg_src1 <= {2'b00, nb_in[1:0]};
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end
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2'b11: begin
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alu_op <= `ALU_OP_EXCH;
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alu_reg_dest <= {2'b00, nb_in[1] && nb_in[0], (!nb_in[1]) && nb_in[0]};
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alu_reg_src1 <= {2'b00, nb_in[1] || nb_in[0], (!nb_in[1]) ^ nb_in[0]};
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alu_halt <= 1;
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end
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endcase
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next_cycle <= `BUSCMD_NOP;
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decstate <= `DEC_ALU_INIT;
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alu_return <= `DEC_START;
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end
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