mirror of
https://github.com/sxpert/hp-saturn
synced 2024-11-16 19:50:19 +01:00
143 lines
3.4 KiB
Verilog
143 lines
3.4 KiB
Verilog
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/*
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*
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*
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*
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*
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*/
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/*
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*
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* Block vars registers
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*
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*/
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reg block_0x;
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wire do_block_0x;
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assign do_block_0x = do_on_other_nibbles && block_0x;
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reg block_0Efx;
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wire do_block_0Efx;
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assign do_block_0Efx = do_on_other_nibbles && block_0Efx;
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reg block_1x;
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wire do_block_1x;
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assign do_block_1x = do_on_other_nibbles && block_1x;
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reg block_save_to_R_W;
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wire do_block_save_to_R_W;
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assign do_block_save_to_R_W = do_on_other_nibbles && block_save_to_R_W;
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reg block_rest_from_R_W;
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wire do_block_rest_from_R_W;
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assign do_block_rest_from_R_W = do_on_other_nibbles && block_rest_from_R_W;
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reg block_exch_with_R_W;
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wire do_block_exch_with_R_W;
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assign do_block_exch_with_R_W = do_on_other_nibbles && block_exch_with_R_W;
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wire do_block_Rn_A_C;
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assign do_block_Rn_A_C = do_on_other_nibbles &&
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( block_save_to_R_W ||
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block_rest_from_R_W ||
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block_exch_with_R_W );
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reg block_13x;
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wire do_block_13x;
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assign do_block_13x = do_on_other_nibbles && block_13x;
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reg block_14x_15xx;
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wire do_block_14x_15xx;
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assign do_block_14x_15xx = do_on_other_nibbles && block_14x_15xx;
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reg block_15xx;
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wire do_block_15xx;
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assign do_block_15xx = do_on_other_nibbles && block_15xx;
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reg block_pointer_arith_const;
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wire do_block_pointer_arith_const;
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assign do_block_pointer_arith_const = do_on_other_nibbles && block_pointer_arith_const;
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reg block_2x;
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wire do_block_2x;
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assign do_block_2x = do_on_other_nibbles && block_2x;
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reg block_3x;
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wire do_block_3x;
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assign do_block_3x = do_on_other_nibbles && block_3x;
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// reg block_jmp2_cry_set;
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// reg block_jmp2_cry_clr;
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reg block_8x;
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wire do_block_8x;
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assign do_block_8x = do_on_other_nibbles && block_8x;
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reg block_80x;
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wire do_block_80x;
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assign do_block_80x = do_on_other_nibbles && block_80x;
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reg block_80Cx;
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wire do_block_80Cx;
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assign do_block_80Cx = do_on_other_nibbles && block_80Cx;
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reg block_82x;
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wire do_block_82x;
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assign do_block_82x = do_on_other_nibbles && block_82x;
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reg block_8Ax;
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wire do_block_8Ax;
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assign do_block_8Ax = do_on_other_nibbles && block_8Ax;
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reg block_jump_test;
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reg block_jump_test2;
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wire do_block_jump_test;
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wire do_block_jump_test2;
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assign do_block_jump_test = do_on_other_nibbles && block_jump_test;
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assign do_block_jump_test2 = do_on_other_nibbles && block_jump_test2;
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reg block_Ax;
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wire do_block_Ax;
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assign do_block_Ax = do_on_other_nibbles && block_Ax;
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reg block_Aax;
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wire do_block_Aax;
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assign do_block_Aax = do_on_other_nibbles && block_Aax;
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reg block_Abx;
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wire do_block_Abx;
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assign do_block_Abx = do_on_other_nibbles && block_Abx;
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reg block_Cx;
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wire do_block_Cx;
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assign do_block_Cx = do_on_other_nibbles && block_Cx;
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reg block_Dx;
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wire do_block_Dx;
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assign do_block_Dx = do_on_other_nibbles && block_Dx;
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reg block_Fx;
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wire do_block_Fx;
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assign do_block_Fx = do_on_other_nibbles && block_Fx;
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reg go_fields_table;
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/*
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* subroutines
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*/
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reg block_load_reg_imm;
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wire do_load_reg_imm;
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assign do_load_reg_imm = do_on_other_nibbles && block_load_reg_imm;
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reg block_jmp;
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wire do_block_jmp;
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assign do_block_jmp = do_on_other_nibbles && block_jmp;
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reg block_sr_bit;
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wire do_block_sr_bit;
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assign do_block_sr_bit = do_on_other_nibbles && block_sr_bit;
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wire in_fields_table;
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assign in_fields_table = go_fields_table && !fields_table_done;
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