mirror of
https://github.com/sxpert/hp-saturn
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cbfbe4eb3f
add add_cst and sub_cst alu opcodes port pointer math to use ALU make A[ab]x more readable
33 lines
No EOL
1,010 B
Verilog
33 lines
No EOL
1,010 B
Verilog
`ifndef _DBG_CONST
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`define _DBG_CONST
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`define DBG_OP_RTNSXM 16'h0001
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`define DBG_OP_RTN 16'h0002
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`define DBG_OP_RTNSC 16'h0003
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`define DBG_OP_RTNCC 16'h0004
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`define DBG_OP_SETHEX 16'h0005
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`define DBG_OP_SETDEC 16'h0006
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`define DBG_OP_RSTK_C 16'h0007
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`define DBG_OP_C_RSTK 16'h0008
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`define DBG_OP_CLRST 16'h0009
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`define DBG_OP_C_ST 16'h000A
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`define DBG_OP_ST_C 16'h000B
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`define DBG_OP_CSTEX 16'h000C
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`define DBG_OP_INC 16'h000D
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`define DBG_OP_DEC 16'h000E
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`define DBG_OP_AND 16'h000F
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`define DBG_OP_OR 16'h0010
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`define DBG_OP_RTI 16'h0011
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`define DBG_OP_COPY_FULL 16'h0012
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`define DEB_OP_COPY 16'h0013
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`define DBG_OP_EXCH_FULL 16'h0014
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`define DBG_OP_EXCH 16'h0015
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`define DBG_OP_MEM_IN 16'h0016
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`define DBG_OP_MEM_OUT 16'h0017
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`define DBG_OP_ADD_CONST 16'h0018
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`define DBG_OP_SUB_CONST 16'h0019
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`define DBG_OP_LOAD_IMM 16'h001A
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`endif |