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cleanup the simulated rom interface

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This commit is contained in:
Raphael Jacquot 2019-02-18 11:36:28 +01:00
parent 1444baca19
commit f660168393
3 changed files with 74 additions and 42 deletions
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3
README → README.md
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@ -27,4 +27,5 @@ MODE="664", GROUP="dialout"
this is for ujprog libusb access this is for ujprog libusb access
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", \ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", \
GROUP="dialout", MODE="666" GROUP="dialout", MODE="666"

111
saturn_bus_ctrl.v
View file

@ -66,24 +66,27 @@ input wire [0:0] i_cmd_config;
input wire [3:0] i_nibble; input wire [3:0] i_nibble;
output reg [3:0] o_nibble; output reg [3:0] o_nibble;
/* /******************************************************************************
* events *
*/ * clocking enables
*
****************************************************************************/
wire en_bus_send;
wire en_bus_recv;
wire en_bus_ecmd;
wire en_bus_send;
assign en_bus_send = i_en_bus_send && !i_stalled; assign en_bus_send = i_en_bus_send && !i_stalled;
wire en_bus_recv;
assign en_bus_recv = i_en_bus_recv && !i_stalled; assign en_bus_recv = i_en_bus_recv && !i_stalled;
wire en_bus_ecmd;
assign en_bus_ecmd = i_en_bus_ecmd && !i_stalled; assign en_bus_ecmd = i_en_bus_ecmd && !i_stalled;
/* /******************************************************************************
* states *
*/ * state machine events
*
****************************************************************************/
wire [0:0] addr_s; // declarations
assign addr_s = addr_cnt == 5;
reg [0:0] cmd_pc_read_s; reg [0:0] cmd_pc_read_s;
reg [0:0] dp_read_s; reg [0:0] dp_read_s;
@ -92,6 +95,8 @@ reg [0:0] cmd_load_dp_s;
reg [0:0] cmd_config_s; reg [0:0] cmd_config_s;
reg [0:0] cmd_reset_s; reg [0:0] cmd_reset_s;
wire [0:0] addr_s;
wire [0:0] do_cmd_pc_read; wire [0:0] do_cmd_pc_read;
wire [0:0] do_display_stalled; wire [0:0] do_display_stalled;
@ -120,6 +125,10 @@ wire [0:0] cmd_reset_uc;
wire [0:0] do_unstall; wire [0:0] do_unstall;
wire [0:0] do_cleanup; wire [0:0] do_cleanup;
// assigns
assign addr_s = addr_cnt == 5;
assign do_cmd_load_dp = i_cmd_load_dp && !cmd_load_dp_s; assign do_cmd_load_dp = i_cmd_load_dp && !cmd_load_dp_s;
assign do_dp_read_data = i_cmd_dp_read && cmd_load_dp_s && (addr_s || dp_read_s); assign do_dp_read_data = i_cmd_dp_read && cmd_load_dp_s && (addr_s || dp_read_s);
@ -149,7 +158,7 @@ assign do_cmd_pc_read = !cmd_pc_read_s &&
do_pc_read_after_config || do_pc_read_after_config ||
do_pc_read_after_reset); do_pc_read_after_reset);
assign do_display_stalled = i_read_stall && !o_stalled_by_bus && assign do_display_stalled = en_bus_recv && i_read_stall && !o_stalled_by_bus &&
!(do_cmd_pc_read || !(do_cmd_pc_read ||
do_dp_read_data || do_dp_read_data ||
do_pc_read_after_dp_read || do_pc_read_after_dp_read ||
@ -166,9 +175,12 @@ assign do_cleanup = do_cleanup_after_dp_read ||
cmd_load_dp_dp_write_uc || cmd_load_dp_dp_write_uc ||
cmd_config_uc || cmd_config_uc ||
cmd_reset_uc; cmd_reset_uc;
/* /******************************************************************************
* test rom... *
*/ * test rom
*
****************************************************************************/
`ifdef SIM `ifdef SIM
`define ROMBITS 20 `define ROMBITS 20
`else `else
@ -177,11 +189,30 @@ assign do_cleanup = do_cleanup_after_dp_read ||
reg [3:0] rom [0:2**`ROMBITS-1]; reg [3:0] rom [0:2**`ROMBITS-1];
wire [0:0] last_cmd_pc_read;
wire [0:0] last_cmd_dp_read;
wire [0:0] do_read_from_bus;
wire [0:0] use_pc_as_pointer;
wire [`ROMBITS-1:0] read_pointer;
assign last_cmd_pc_read = (last_cmd == `BUSCMD_PC_READ);
assign last_cmd_dp_read = (last_cmd == `BUSCMD_DP_READ);
assign do_read_from_bus = en_bus_recv && (!i_read_stall || do_dp_read_data) && (last_cmd_pc_read || last_cmd_dp_read);
assign use_pc_as_pointer = last_cmd_pc_read ;
assign read_pointer = use_pc_as_pointer?local_pc[`ROMBITS-1:0]:local_dp[`ROMBITS-1:0];
/******************************************************************************
*
* the controller itself
*
****************************************************************************/
initial begin initial begin
`ifdef SIM // `ifdef SIM
$readmemh("rom-gx-r.hex", rom); $readmemh("rom-gx-r.hex", rom, 0, 2**`ROMBITS-1);
// $readmemh( "testrom-2.hex", rom); // $readmemh( "testrom-2.hex", rom);
`ifdef SIM
// $monitor({"o_stalled_by_bus %b | i_read_stall %b | i_cmd_dp_read %b |", // $monitor({"o_stalled_by_bus %b | i_read_stall %b | i_cmd_dp_read %b |",
// " cmd_load_dp_s %b | addr_s %b | dp_read_s %b |do_dp_read_data %b"}, // " cmd_load_dp_s %b | addr_s %b | dp_read_s %b |do_dp_read_data %b"},
// o_stalled_by_bus, i_read_stall, i_cmd_dp_read, cmd_load_dp_s, // o_stalled_by_bus, i_read_stall, i_cmd_dp_read, cmd_load_dp_s,
@ -303,8 +334,10 @@ always @(posedge i_clk) begin
// sending address bits // sending address bits
if (send_addr) begin if (send_addr) begin
`ifdef SIM
$display("BUS_SEND %0d: [%d] addr[%0d] %h =>", $display("BUS_SEND %0d: [%d] addr[%0d] %h =>",
`PH_BUS_SEND, i_cycle_ctr, addr_cnt, i_address[addr_cnt*4+:4]); `PH_BUS_SEND, i_cycle_ctr, addr_cnt, i_address[addr_cnt*4+:4]);
`endif
o_bus_data <= i_address[addr_cnt*4+:4]; o_bus_data <= i_address[addr_cnt*4+:4];
addr_cnt <= addr_cnt + 1; addr_cnt <= addr_cnt + 1;
o_bus_strobe <= 1; o_bus_strobe <= 1;
@ -336,38 +369,35 @@ always @(posedge i_clk) begin
* *
*/ */
if (en_bus_recv) begin if (do_read_from_bus) begin
`ifdef SIM
if (!i_read_stall || do_dp_read_data) $display("BUS_RECV %0d: [%d] <= READ(%s) [%5h] %h",
case (last_cmd) `PH_BUS_RECV, i_cycle_ctr, use_pc_as_pointer?"PC":"DP",
`BUSCMD_PC_READ: begin read_pointer, rom[read_pointer]);
$display("BUS_RECV %0d: [%d] <= READ(PC) [%5h] %h", `PH_BUS_RECV, i_cycle_ctr, local_pc, rom[local_pc[`ROMBITS-1:0]]); `endif
o_nibble <= rom[local_pc[`ROMBITS-1:0]]; o_nibble <= rom[read_pointer];
local_pc <= local_pc + 1; if (use_pc_as_pointer) local_pc <= local_pc + 1;
end else begin
`BUSCMD_DP_READ: begin local_dp <= local_dp + 1;
$display("BUS_RECV %0d: [%d] <= READ(DP) [%5h] %h", `PH_BUS_RECV, i_cycle_ctr, local_dp, rom[local_dp[`ROMBITS-1:0]]); dp_read_s <= 1;
o_nibble <= rom[local_dp[`ROMBITS-1:0]]; end
local_dp <= local_dp + 1; end
dp_read_s <= 1;
end if (do_display_stalled) begin
endcase
if (do_display_stalled) begin
$display("BUS_RECV %0d: [%d] STALLED", `PH_BUS_RECV, i_cycle_ctr); $display("BUS_RECV %0d: [%d] STALLED", `PH_BUS_RECV, i_cycle_ctr);
end end
/* /*
* *
* resets the bus automatically * resets the bus automatically
* *
*/ */
if (en_bus_recv) begin
o_bus_strobe <= 0; o_bus_strobe <= 0;
o_bus_cmd_data <= 1; o_bus_cmd_data <= 1;
end end
if (en_bus_ecmd) begin if (en_bus_ecmd) begin
// stalling and unstalling stuff // stalling and unstalling stuff
@ -390,9 +420,10 @@ always @(posedge i_clk) begin
// command automatic switchover // command automatic switchover
case (last_cmd) case (last_cmd)
`BUSCMD_NOP: begin end
`BUSCMD_LOAD_PC, `BUSCMD_LOAD_PC,
`BUSCMD_LOAD_DP: `BUSCMD_LOAD_DP:
if (send_addr && (addr_cnt == 5)) begin if (send_addr && addr_s) begin
// reset the addr count for next time // reset the addr count for next time
$display("BUS_ECMD %0d: [%d] <= %s_READ mode", $display("BUS_ECMD %0d: [%d] <= %s_READ mode",
`PH_BUS_ECMD, i_cycle_ctr, `PH_BUS_ECMD, i_cycle_ctr,

2
saturn_core.v
View file

@ -363,7 +363,7 @@ always @(posedge clk) begin
clock_end <= 0; clock_end <= 0;
cycle_ctr <= ~0; cycle_ctr <= ~0;
max_cycle <= 420; max_cycle <= 450;
mem_ctrl_stall <= 0; mem_ctrl_stall <= 0;
`ifndef SIM `ifndef SIM