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first verilator error fixes

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This commit is contained in:
Raphael Jacquot 2019-03-14 13:33:07 +01:00
parent d808e636c2
commit ef93420950
1 changed files with 2 additions and 2 deletions
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4
saturn_alu_module.v
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@ -44,7 +44,7 @@ module saturn_alu_module (
i_calc_pos, i_calc_pos,
o_calc_res_1_val, o_calc_res_1_val,
o_calc_res_2_val, o_calc_res_2_val,
o_calc_carry, o_calc_carry
); );
input wire [0:0] i_clk; input wire [0:0] i_clk;
@ -73,7 +73,7 @@ output reg [0:0] o_calc_carry;
always @(*) begin always @(*) begin
o_calc_res_1_val = 4'h0; o_calc_res_1_val = 4'h0;
o_calc_res_2_val = 4'h0; o_calc_res_2_val = 4'h0;
o_calc_carry = 2'b0; o_calc_carry = 1'b0;
if (i_clk_en && i_run && !i_done) begin if (i_clk_en && i_run && !i_done) begin
case (i_opcode) case (i_opcode)
`ALU_OP_ZERO: $display("ALU %0d: [%d] res1 <= 0", i_phase, i_cycle_ctr); `ALU_OP_ZERO: $display("ALU %0d: [%d] res1 <= 0", i_phase, i_cycle_ctr);