add register 0

This commit is contained in:
Raphael Jacquot 2019-02-15 09:00:00 +01:00
parent ff021e7618
commit e1f099145e

View file

@ -68,6 +68,8 @@
`define ALU_REG_M 21
`define ALU_REG_IMM 22
`define ALU_REG_ZERO 31
// specific bits
`define ALU_HST_XM 0
`define ALU_HST_SB 1