mirror of
https://github.com/sxpert/hp-saturn
synced 2024-12-27 09:58:16 +01:00
commit more stuff
This commit is contained in:
Raphael Jacquot
parent
7fcce53689
commit
d2e7f7d035
5 changed files with 466 additions and 16 deletions
1
.gitignore
vendored
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1
.gitignore
vendored
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@ -0,0 +1 @@
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saturn_core.json
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2
compile
2
compile
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@ -2,4 +2,4 @@
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#yosys -p "synth_ecp5 -top mask_gen -json mask_gen.json" mask_gen.v
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#nextpnr-ecp5 --gui --um-85k --speed 6 --freq 5 --json mask_gen.json --save mask_gen.ecp5
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yosys -p "synth_ecp5 -top saturn_core -json saturn_core.json" saturn_core.v
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nextpnr-ecp5 --gui --um-85k --speed 6 --freq 5 --json saturn_core.json --save saturn_core.ecp5
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nextpnr-ecp5 --gui --um-85k --speed 6 --freq 5 --lpf ulx3s_v20.lpf --json saturn_core.json --save saturn_core.ecp5
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@ -14312,7 +14312,7 @@
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"src": "saturn_core.v:39"
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},
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"ports": {
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"clk": {
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"clk_25mhz": {
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"direction": "input",
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"bits": [ 2 ]
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},
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@ -14336,47 +14336,39 @@
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"cells": {
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},
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"netnames": {
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"calc_rom.clk": {
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"clk_25mhz": {
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:141|saturn_core.v:10",
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"unused_bits": "0"
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}
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},
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"clk": {
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:40"
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"src": "saturn_core.v:43"
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}
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},
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"decstate": {
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"hide_name": 0,
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"bits": [ "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0", "0" ],
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"attributes": {
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"src": "saturn_core.v:44"
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"src": "saturn_core.v:48"
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}
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},
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"halt": {
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"hide_name": 0,
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"bits": [ "0" ],
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"attributes": {
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"src": "saturn_core.v:42"
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"src": "saturn_core.v:46"
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}
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},
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"reset": {
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"hide_name": 0,
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"bits": [ 3 ],
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"attributes": {
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"src": "saturn_core.v:41"
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"src": "saturn_core.v:45"
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}
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},
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"runstate": {
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"hide_name": 0,
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"bits": [ "1", "1", "1", "1" ],
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"attributes": {
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"src": "saturn_core.v:43"
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"src": "saturn_core.v:47"
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}
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}
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}
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@ -15,6 +15,7 @@ module hp_rom (
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localparam ROM_FILENAME = "rom-gx-r.hex";
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reg [3:0] rom [0:(2**20)-1];
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//reg[3:0] rom [0:(2**16)-1];
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initial
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@ -37,7 +38,11 @@ endmodule
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*/
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module saturn_core (
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`ifdef SIM
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input clk,
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`else
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input clk_25mhz,
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`endif
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input reset,
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output halt,
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output [3:0] runstate,
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452
ulx3s_v20.lpf
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452
ulx3s_v20.lpf
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@ -0,0 +1,452 @@
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BLOCK RESETPATHS;
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BLOCK ASYNCPATHS;
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## ULX3S v2.x.x and v3.0.x
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# The clock "usb" and "gpdi" sheet
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LOCATE COMP "clk_25mhz" SITE "G2";
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IOBUF PORT "clk_25mhz" PULLMODE=NONE IO_TYPE=LVCMOS33;
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FREQUENCY PORT "clk_25mhz" 25 MHZ;
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# JTAG and SPI FLASH voltage 3.3V and options to boot from SPI flash
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# write to FLASH possible any time from JTAG:
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SYSCONFIG CONFIG_IOVOLTAGE=3.3 COMPRESS_CONFIG=ON MCCLK_FREQ=62 MASTER_SPI_PORT=ENABLE SLAVE_SPI_PORT=DISABLE SLAVE_PARALLEL_PORT=DISABLE;
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# write to FLASH possible from user bitstream:
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# SYSCONFIG CONFIG_IOVOLTAGE=3.3 COMPRESS_CONFIG=ON MCCLK_FREQ=62 MASTER_SPI_PORT=DISABLE SLAVE_SPI_PORT=DISABLE SLAVE_PARALLEL_PORT=DISABLE;
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## USBSERIAL FTDI-FPGA serial port "usb" sheet
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LOCATE COMP "ftdi_rxd" SITE "L4"; # FPGA transmits to ftdi
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LOCATE COMP "ftdi_txd" SITE "M1"; # FPGA receives from ftdi
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LOCATE COMP "ftdi_nrts" SITE "M3"; # FPGA receives
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LOCATE COMP "ftdi_ndtr" SITE "N1"; # FPGA receives
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LOCATE COMP "ftdi_txden" SITE "L3"; # FPGA receives
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IOBUF PORT "ftdi_rxd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "ftdi_txd" PULLMODE=UP IO_TYPE=LVCMOS33;
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IOBUF PORT "ftdi_nrts" PULLMODE=UP IO_TYPE=LVCMOS33;
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IOBUF PORT "ftdi_ndtr" PULLMODE=UP IO_TYPE=LVCMOS33;
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IOBUF PORT "ftdi_txden" PULLMODE=UP IO_TYPE=LVCMOS33;
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## LED indicators "blinkey" and "gpio" sheet
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LOCATE COMP "led[7]" SITE "H3";
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LOCATE COMP "led[6]" SITE "E1";
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LOCATE COMP "led[5]" SITE "E2";
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LOCATE COMP "led[4]" SITE "D1";
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LOCATE COMP "led[3]" SITE "D2";
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LOCATE COMP "led[2]" SITE "C1";
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LOCATE COMP "led[1]" SITE "C2";
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LOCATE COMP "led[0]" SITE "B2";
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IOBUF PORT "led[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "led[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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## Pushbuttons "blinkey", "flash", "power", "gpdi" sheet
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LOCATE COMP "btn[0]" SITE "D6"; # BTN_PWRn (inverted logic)
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LOCATE COMP "btn[1]" SITE "R1"; # FIRE1
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LOCATE COMP "btn[2]" SITE "T1"; # FIRE2
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LOCATE COMP "btn[3]" SITE "R18"; # UP W1->R18
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LOCATE COMP "btn[4]" SITE "V1"; # DOWN
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LOCATE COMP "btn[5]" SITE "U1"; # LEFT
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LOCATE COMP "btn[6]" SITE "H16"; # RIGHT Y2->H16
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IOBUF PORT "btn[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "btn[1]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "btn[2]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "btn[3]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "btn[4]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "btn[5]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "btn[6]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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## DIP switch "blinkey", "gpio" sheet
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LOCATE COMP "sw[0]" SITE "E8"; # SW1
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LOCATE COMP "sw[1]" SITE "D8"; # SW2
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LOCATE COMP "sw[2]" SITE "D7"; # SW3
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LOCATE COMP "sw[3]" SITE "E7"; # SW4
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IOBUF PORT "sw[0]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sw[1]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sw[2]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sw[3]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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## SPI OLED DISPLAY SSD1331 (Color) or SSD1306 (B/W) "blinkey", "usb" sheet
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LOCATE COMP "oled_clk" SITE "P4";
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LOCATE COMP "oled_mosi" SITE "P3";
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LOCATE COMP "oled_dc" SITE "P1";
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LOCATE COMP "oled_resn" SITE "P2";
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LOCATE COMP "oled_csn" SITE "N2";
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IOBUF PORT "oled_clk" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "oled_mosi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "oled_dc" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "oled_resn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "oled_csn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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## SPI Flash chip "flash" sheet
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LOCATE COMP "flash_csn" SITE "R2";
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LOCATE COMP "flash_clk" SITE "U3";
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LOCATE COMP "flash_mosi" SITE "W2";
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LOCATE COMP "flash_miso" SITE "V2";
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LOCATE COMP "flash_holdn" SITE "W1";
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LOCATE COMP "flash_wpn" SITE "Y2";
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#LOCATE COMP "flash_csspin" SITE "AJ3";
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#LOCATE COMP "flash_initn" SITE "AG4";
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#LOCATE COMP "flash_done" SITE "AJ4";
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#LOCATE COMP "flash_programn" SITE "AH4";
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#LOCATE COMP "flash_cfg_select[0]" SITE "AM4";
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#LOCATE COMP "flash_cfg_select[1]" SITE "AL4";
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#LOCATE COMP "flash_cfg_select[2]" SITE "AK4";
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IOBUF PORT "flash_csn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "flash_clk" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "flash_mosi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "flash_miso" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "flash_holdn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "flash_wpn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_csspin" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_initn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_done" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_programn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_cfg_select[0]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_cfg_select[1]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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#IOBUF PORT "flash_cfg_select[2]" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
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## SD card "sdcard", "usb" sheet
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LOCATE COMP "sd_clk" SITE "H2"; # sd_clk WiFi_GPIO14
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LOCATE COMP "sd_cmd" SITE "J1"; # sd_cmd_di (MOSI) WiFi GPIO15
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LOCATE COMP "sd_d[0]" SITE "J3"; # sd_dat0_do (MISO) WiFi GPIO2
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LOCATE COMP "sd_d[1]" SITE "H1"; # sd_dat1_irq WiFi GPIO4
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LOCATE COMP "sd_d[2]" SITE "K1"; # sd_dat2 WiFi_GPIO12
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LOCATE COMP "sd_d[3]" SITE "K2"; # sd_dat3_csn WiFi_GPIO13
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LOCATE COMP "sd_wp" SITE "P5"; # not connected
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LOCATE COMP "sd_cdn" SITE "N5"; # not connected
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IOBUF PORT "sd_clk" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sd_cmd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sd_d[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sd_d[1]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sd_d[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4; # WiFi GPIO12 pulldown bootstrapping requirement
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IOBUF PORT "sd_d[3]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sd_wp" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "sd_cdn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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## ADC SPI (MAX11123) "analog", "ram" sheet
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LOCATE COMP "adc_csn" SITE "R17";
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LOCATE COMP "adc_mosi" SITE "R16";
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LOCATE COMP "adc_miso" SITE "U16";
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LOCATE COMP "adc_sclk" SITE "P17";
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IOBUF PORT "adc_csn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "adc_mosi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "adc_miso" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "adc_sclk" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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## Audio 4-bit DAC "analog", "gpio" sheet
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# Output impedance 75 ohm.
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# Strong enough to drive 16 ohm earphones.
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LOCATE COMP "audio_l[3]" SITE "B3"; # JACK TIP (left audio)
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LOCATE COMP "audio_l[2]" SITE "C3";
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LOCATE COMP "audio_l[1]" SITE "D3";
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LOCATE COMP "audio_l[0]" SITE "E4";
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LOCATE COMP "audio_r[3]" SITE "C5"; # JACK RING1 (right audio)
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LOCATE COMP "audio_r[2]" SITE "D5";
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LOCATE COMP "audio_r[1]" SITE "B5";
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LOCATE COMP "audio_r[0]" SITE "A3";
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LOCATE COMP "audio_v[3]" SITE "E5"; # JACK RING2 (video or digital audio)
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LOCATE COMP "audio_v[2]" SITE "F5";
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LOCATE COMP "audio_v[1]" SITE "F2";
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LOCATE COMP "audio_v[0]" SITE "H5";
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IOBUF PORT "audio_l[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_l[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_l[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_l[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_r[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_r[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_r[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_r[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_v[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_v[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_v[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "audio_v[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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## WiFi ESP-32 "wifi", "usb", "flash" sheet
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# other pins are shared with GP/GN, SD card and JTAG
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LOCATE COMP "wifi_en" SITE "F1"; # enable/reset WiFi
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LOCATE COMP "wifi_rxd" SITE "K3"; # FPGA transmits to WiFi
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LOCATE COMP "wifi_txd" SITE "K4"; # FPGA receives from WiFi
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LOCATE COMP "wifi_gpio0" SITE "L2";
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LOCATE COMP "wifi_gpio5" SITE "N4"; # WIFI LED
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LOCATE COMP "wifi_gpio16" SITE "L1"; # Serial1 RX
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LOCATE COMP "wifi_gpio17" SITE "N3"; # Serial1 TX
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# LOCATE COMP "prog_done" SITE "Y3"; # not GPIO, always active
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IOBUF PORT "wifi_en" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "wifi_rxd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "wifi_txd" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "wifi_gpio0" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "wifi_gpio16" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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IOBUF PORT "wifi_gpio17" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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# IOBUF PORT "prog_done" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
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## PCB antenna 433 MHz (may be also used for FM) "usb" sheet
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LOCATE COMP "ant_433mhz" SITE "G1";
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IOBUF PORT "ant_433mhz" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
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## Second USB port "US2" going directly into FPGA "usb", "ram" sheet
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LOCATE COMP "usb_fpga_dp" SITE "E16"; # single ended or differential input only
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LOCATE COMP "usb_fpga_dn" SITE "F16";
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IOBUF PORT "usb_fpga_dp" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "usb_fpga_dn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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LOCATE COMP "usb_fpga_bd_dp" SITE "D15"; # differential bidirectional
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LOCATE COMP "usb_fpga_bd_dn" SITE "E15";
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IOBUF PORT "usb_fpga_bd_dp" PULLMODE=NONE IO_TYPE=LVCMOS33D DRIVE=4;
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IOBUF PORT "usb_fpga_bd_dn" PULLMODE=NONE IO_TYPE=LVCMOS33D DRIVE=4;
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LOCATE COMP "usb_fpga_pu_dp" SITE "B12"; # pull up/down control
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LOCATE COMP "usb_fpga_pu_dn" SITE "C12";
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IOBUF PORT "usb_fpga_pu_dp" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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IOBUF PORT "usb_fpga_pu_dn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=16;
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## JTAG ESP-32 "usb" sheet
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# connected to FT231X and ESP-32
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# commented out because those are dedicated pins, not directly useable as GPIO
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# but could be used by some vendor-specific JTAG bridging (boundary scan) module
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#LOCATE COMP "jtag_tdi" SITE "R5"; # FTDI_nRI FPGA receives
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#LOCATE COMP "jtag_tdo" SITE "V4"; # FTDI_nCTS FPGA transmits
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#LOCATE COMP "jtag_tck" SITE "T5"; # FTDI_nDSR FPGA receives
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#LOCATE COMP "jtag_tms" SITE "U5"; # FTDI_nDCD FPGA receives
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#IOBUF PORT "jtag_tdi" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
#IOBUF PORT "jtag_tdo" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
#IOBUF PORT "jtag_tck" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
#IOBUF PORT "jtag_tms" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
|
||||
## SDRAM "ram" sheet
|
||||
LOCATE COMP "sdram_clk" SITE "F19";
|
||||
LOCATE COMP "sdram_cke" SITE "F20";
|
||||
LOCATE COMP "sdram_csn" SITE "P20";
|
||||
LOCATE COMP "sdram_wen" SITE "T20";
|
||||
LOCATE COMP "sdram_rasn" SITE "R20";
|
||||
LOCATE COMP "sdram_casn" SITE "T19";
|
||||
LOCATE COMP "sdram_a[0]" SITE "M20";
|
||||
LOCATE COMP "sdram_a[1]" SITE "M19";
|
||||
LOCATE COMP "sdram_a[2]" SITE "L20";
|
||||
LOCATE COMP "sdram_a[3]" SITE "L19";
|
||||
LOCATE COMP "sdram_a[4]" SITE "K20";
|
||||
LOCATE COMP "sdram_a[5]" SITE "K19";
|
||||
LOCATE COMP "sdram_a[6]" SITE "K18";
|
||||
LOCATE COMP "sdram_a[7]" SITE "J20";
|
||||
LOCATE COMP "sdram_a[8]" SITE "J19";
|
||||
LOCATE COMP "sdram_a[9]" SITE "H20";
|
||||
LOCATE COMP "sdram_a[10]" SITE "N19";
|
||||
LOCATE COMP "sdram_a[11]" SITE "G20";
|
||||
LOCATE COMP "sdram_a[12]" SITE "G19";
|
||||
LOCATE COMP "sdram_ba[0]" SITE "P19";
|
||||
LOCATE COMP "sdram_ba[1]" SITE "N20";
|
||||
LOCATE COMP "sdram_dqm[0]" SITE "U19";
|
||||
LOCATE COMP "sdram_dqm[1]" SITE "E20";
|
||||
LOCATE COMP "sdram_d[0]" SITE "J16";
|
||||
LOCATE COMP "sdram_d[1]" SITE "L18";
|
||||
LOCATE COMP "sdram_d[2]" SITE "M18";
|
||||
LOCATE COMP "sdram_d[3]" SITE "N18";
|
||||
LOCATE COMP "sdram_d[4]" SITE "P18";
|
||||
LOCATE COMP "sdram_d[5]" SITE "T18";
|
||||
LOCATE COMP "sdram_d[6]" SITE "T17";
|
||||
LOCATE COMP "sdram_d[7]" SITE "U20";
|
||||
LOCATE COMP "sdram_d[8]" SITE "E19";
|
||||
LOCATE COMP "sdram_d[9]" SITE "D20";
|
||||
LOCATE COMP "sdram_d[10]" SITE "D19";
|
||||
LOCATE COMP "sdram_d[11]" SITE "C20";
|
||||
LOCATE COMP "sdram_d[12]" SITE "E18";
|
||||
LOCATE COMP "sdram_d[13]" SITE "F18";
|
||||
LOCATE COMP "sdram_d[14]" SITE "J18";
|
||||
LOCATE COMP "sdram_d[15]" SITE "J17";
|
||||
IOBUF PORT "sdram_clk" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_cke" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_csn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_wen" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_rasn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_casn" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[8]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[9]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[10]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[11]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_a[12]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_ba[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_ba[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_dqm[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_dqm[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[0]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[1]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[2]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[3]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[4]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[5]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[6]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[7]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[8]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[9]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[10]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[11]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[12]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[13]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[14]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "sdram_d[15]" PULLMODE=NONE IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
|
||||
# GPDI differential interface (Video) "gpdi" sheet
|
||||
LOCATE COMP "gpdi_dp[0]" SITE "A16"; # Blue +
|
||||
LOCATE COMP "gpdi_dn[0]" SITE "B16"; # Blue -
|
||||
LOCATE COMP "gpdi_dp[1]" SITE "A14"; # Green +
|
||||
LOCATE COMP "gpdi_dn[1]" SITE "C14"; # Green -
|
||||
LOCATE COMP "gpdi_dp[2]" SITE "A12"; # Red +
|
||||
LOCATE COMP "gpdi_dn[2]" SITE "A13"; # Red -
|
||||
LOCATE COMP "gpdi_dp[3]" SITE "A17"; # Clock +
|
||||
LOCATE COMP "gpdi_dn[3]" SITE "B18"; # Clock -
|
||||
LOCATE COMP "gpdi_ethp" SITE "A19"; # Ethernet +
|
||||
LOCATE COMP "gpdi_ethn" SITE "B20"; # Ethernet -
|
||||
LOCATE COMP "gpdi_cec" SITE "A18";
|
||||
LOCATE COMP "gpdi_sda" SITE "B19"; # I2C shared with RTC
|
||||
LOCATE COMP "gpdi_scl" SITE "E12"; # I2C shared with RTC C12->E12
|
||||
IOBUF PORT "gpdi_dp[0]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dn[0]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dp[1]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dn[1]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dp[2]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dn[2]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dp[3]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_dn[3]" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_ethp" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_ethn" IO_TYPE=LVCMOS33D DRIVE=4;
|
||||
IOBUF PORT "gpdi_cec" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gpdi_sda" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gpdi_scl" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
|
||||
# GPIO (default single-ended) "gpio", "ram", "gpdi" sheet
|
||||
# Pins enumerated gp[0-27], gn[0-27].
|
||||
# With differential mode enabled on Lattice,
|
||||
# gp[] (+) are used, gn[] (-) are ignored from design
|
||||
# as they handle inverted signal by default.
|
||||
# To enable differential, rename LVCMOS33->LVCMOS33D
|
||||
LOCATE COMP "gp[0]" SITE "B11"; # J1_5+ GP0
|
||||
LOCATE COMP "gn[0]" SITE "C11"; # J1_5- GN0
|
||||
LOCATE COMP "gp[1]" SITE "A10"; # J1_7+ GP1
|
||||
LOCATE COMP "gn[1]" SITE "A11"; # J1_7- GN1
|
||||
LOCATE COMP "gp[2]" SITE "A9"; # J1_9+ GP2
|
||||
LOCATE COMP "gn[2]" SITE "B10"; # J1_9- GN2
|
||||
LOCATE COMP "gp[3]" SITE "B9"; # J1_11+ GP3
|
||||
LOCATE COMP "gn[3]" SITE "C10"; # J1_11- GN3
|
||||
LOCATE COMP "gp[4]" SITE "A7"; # J1_13+ GP4
|
||||
LOCATE COMP "gn[4]" SITE "A8"; # J1_13- GN4
|
||||
LOCATE COMP "gp[5]" SITE "C8"; # J1_15+ GP5
|
||||
LOCATE COMP "gn[5]" SITE "B8"; # J1_15- GN5
|
||||
LOCATE COMP "gp[6]" SITE "C6"; # J1_17+ GP6
|
||||
LOCATE COMP "gn[6]" SITE "C7"; # J1_17- GN6
|
||||
IOBUF PORT "gp[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[0]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[1]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[1]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[2]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[2]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[3]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[3]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[4]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[4]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[5]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[5]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[6]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[6]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
LOCATE COMP "gp[7]" SITE "A6"; # J1_23+ GP7
|
||||
LOCATE COMP "gn[7]" SITE "B6"; # J1_23- GN7
|
||||
LOCATE COMP "gp[8]" SITE "A4"; # J1_25+ GP8
|
||||
LOCATE COMP "gn[8]" SITE "A5"; # J1_25- GN8
|
||||
LOCATE COMP "gp[9]" SITE "A2"; # J1_27+ GP9
|
||||
LOCATE COMP "gn[9]" SITE "B1"; # J1_27- GN9
|
||||
LOCATE COMP "gp[10]" SITE "C4"; # J1_29+ GP10 WIFI_GPIO27
|
||||
LOCATE COMP "gn[10]" SITE "B4"; # J1_29- GN10
|
||||
LOCATE COMP "gp[11]" SITE "F4"; # J1_31+ GP11 WIFI_GPIO25
|
||||
LOCATE COMP "gn[11]" SITE "E3"; # J1_31- GN11 WIFI_GPIO26
|
||||
LOCATE COMP "gp[12]" SITE "G3"; # J1_33+ GP12 WIFI_GPIO32
|
||||
LOCATE COMP "gn[12]" SITE "F3"; # J1_33- GN12 WIFI_GPIO33
|
||||
LOCATE COMP "gp[13]" SITE "H4"; # J1_35+ GP13 WIFI_GPIO34
|
||||
LOCATE COMP "gn[13]" SITE "G5"; # J1_35- GN13 WIFI_GPIO35
|
||||
IOBUF PORT "gp[7]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[7]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[8]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[8]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[9]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[9]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[10]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[10]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[11]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[11]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[12]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[12]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[13]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[13]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
LOCATE COMP "gp[14]" SITE "U18"; # J2_5+ GP14
|
||||
LOCATE COMP "gn[14]" SITE "U17"; # J2_5- GN14
|
||||
LOCATE COMP "gp[15]" SITE "N17"; # J2_7+ GP15
|
||||
LOCATE COMP "gn[15]" SITE "P16"; # J2_7- GN15
|
||||
LOCATE COMP "gp[16]" SITE "N16"; # J2_9+ GP16
|
||||
LOCATE COMP "gn[16]" SITE "M17"; # J2_9- GN16
|
||||
LOCATE COMP "gp[17]" SITE "L16"; # J2_11+ GP17
|
||||
LOCATE COMP "gn[17]" SITE "L17"; # J2_11- GN17
|
||||
LOCATE COMP "gp[18]" SITE "H18"; # J2_13+ GP18
|
||||
LOCATE COMP "gn[18]" SITE "H17"; # J2_13- GN18
|
||||
LOCATE COMP "gp[19]" SITE "F17"; # J2_15+ GP19
|
||||
LOCATE COMP "gn[19]" SITE "G18"; # J2_15- GN19
|
||||
LOCATE COMP "gp[20]" SITE "D18"; # J2_17+ GP20
|
||||
LOCATE COMP "gn[20]" SITE "E17"; # J2_17- GN20
|
||||
IOBUF PORT "gp[14]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[14]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[15]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[15]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[16]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[16]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[17]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[17]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[18]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[18]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[19]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[19]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[20]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[20]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
LOCATE COMP "gp[21]" SITE "C18"; # J2_23+ GP21
|
||||
LOCATE COMP "gn[21]" SITE "D17"; # J2_23- GN21
|
||||
LOCATE COMP "gp[22]" SITE "B15"; # J2_25+ GP22 D15->B15
|
||||
LOCATE COMP "gn[22]" SITE "C15"; # J2_25- GN22 E15->C15
|
||||
LOCATE COMP "gp[23]" SITE "B17"; # J2_27+ GP23
|
||||
LOCATE COMP "gn[23]" SITE "C17"; # J2_27- GN23
|
||||
LOCATE COMP "gp[24]" SITE "C16"; # J2_29+ GP24
|
||||
LOCATE COMP "gn[24]" SITE "D16"; # J2_29- GN24
|
||||
LOCATE COMP "gp[25]" SITE "D14"; # J2_31+ GP25 B15->D14
|
||||
LOCATE COMP "gn[25]" SITE "E14"; # J2_31- GN25 C15->E14
|
||||
LOCATE COMP "gp[26]" SITE "B13"; # J2_33+ GP26
|
||||
LOCATE COMP "gn[26]" SITE "C13"; # J2_33- GN26
|
||||
LOCATE COMP "gp[27]" SITE "D13"; # J2_35+ GP27
|
||||
LOCATE COMP "gn[27]" SITE "E13"; # J2_35- GN27
|
||||
IOBUF PORT "gp[21]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[21]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[22]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[22]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[23]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[23]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[24]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[24]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[25]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[25]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[26]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[26]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gp[27]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
IOBUF PORT "gn[27]" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
|
||||
## PROGRAMN (reload bitstream from FLASH, exit from bootloader)
|
||||
# PCB v2.0.5 and higher
|
||||
LOCATE COMP "user_programn" SITE "M4";
|
||||
IOBUF PORT "user_programn" PULLMODE=UP IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
|
||||
## SHUTDOWN "power", "ram" sheet (connected from PCB v1.7.5)
|
||||
# on PCB v1.7 shutdown is not connected to FPGA
|
||||
LOCATE COMP "shutdown" SITE "G16"; # FPGA receives
|
||||
IOBUF PORT "shutdown" PULLMODE=DOWN IO_TYPE=LVCMOS33 DRIVE=4;
|
||||
Loading…
Reference in a new issue