mirror of
https://github.com/sxpert/hp-saturn
synced 2024-12-27 09:58:16 +01:00
separate reading instructions from reading data
This commit is contained in:
Raphael Jacquot
parent
b519f3d8b3
commit
b5c3a56273
4 changed files with 149 additions and 87 deletions
14
README
14
README
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@ -1,3 +1,17 @@
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Verilog implementation of the HP saturn processor
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licence: GPLv3 or later
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timings:
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read:
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____ ____ ____ ____ ____
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clk : ____| |____| |____| |____| |____| |____
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_________
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address: ____| |_______________________________________
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_________
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data: _________| |__________________________________
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read: ______________|_______________________________________
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@ -66,7 +66,7 @@ initial
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`ifdef SIM
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$write(".");
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`endif
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io_ram[base_addr] <= 0;
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io_ram[base_addr] = 0;
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end
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`ifdef SIM
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$write("\n");
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@ -14309,7 +14309,7 @@
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"saturn_core": {
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"attributes": {
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"top": 1,
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"src": "saturn_core.v:53"
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"src": "saturn_core.v:60"
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},
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"ports": {
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"clk_25mhz": {
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@ -14336,14 +14336,14 @@
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"hide_name": 0,
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"bits": [ 3, 4, 5, 6, 7, 8, 9 ],
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"attributes": {
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"src": "saturn_core.v:55"
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"src": "saturn_core.v:62"
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}
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},
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"bus_ctrl.clk": {
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:201|hp48_bus.v:18",
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"src": "saturn_core.v:208|hp48_bus.v:18",
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"unused_bits": "0"
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}
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},
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@ -14351,7 +14351,7 @@
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:201|hp48_bus.v:38|hp48_io_ram.v:16",
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"src": "saturn_core.v:208|hp48_bus.v:38|hp48_io_ram.v:16",
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"unused_bits": "0"
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}
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},
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@ -14359,7 +14359,7 @@
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"hide_name": 0,
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"bits": [ 4 ],
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"attributes": {
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"src": "saturn_core.v:201|hp48_bus.v:38|hp48_io_ram.v:17",
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"src": "saturn_core.v:208|hp48_bus.v:38|hp48_io_ram.v:17",
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"unused_bits": "0"
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}
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},
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@ -14367,7 +14367,7 @@
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:201|hp48_bus.v:49|hp48_rom.v:16",
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"src": "saturn_core.v:208|hp48_bus.v:49|hp48_rom.v:16",
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"unused_bits": "0"
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}
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},
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@ -14375,7 +14375,7 @@
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"hide_name": 0,
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"bits": [ 4 ],
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"attributes": {
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"src": "saturn_core.v:201|hp48_bus.v:19",
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"src": "saturn_core.v:208|hp48_bus.v:19",
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"unused_bits": "0"
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}
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},
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@ -14383,7 +14383,7 @@
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:59",
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"src": "saturn_core.v:66",
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"unused_bits": "0"
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}
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},
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@ -14391,21 +14391,21 @@
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"hide_name": 0,
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"bits": [ 2 ],
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"attributes": {
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"src": "saturn_core.v:54"
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"src": "saturn_core.v:61"
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}
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},
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"led": {
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"hide_name": 0,
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"bits": [ "0", "0", "0", "0", "0", "0", "0", "0" ],
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"attributes": {
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"src": "saturn_core.v:57"
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"src": "saturn_core.v:64"
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}
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},
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"reset": {
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"hide_name": 0,
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"bits": [ 4 ],
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"attributes": {
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"src": "saturn_core.v:60",
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"src": "saturn_core.v:67",
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"unused_bits": "0"
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}
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},
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@ -14413,7 +14413,7 @@
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"hide_name": 0,
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"bits": [ "1" ],
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"attributes": {
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"src": "saturn_core.v:56"
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"src": "saturn_core.v:63"
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}
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}
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}
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186
saturn_core.v
186
saturn_core.v
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@ -21,18 +21,25 @@
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*
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*/
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`define RUN_INIT 0
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`define NEXT_INSTR 1
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`define NEXT_INSTR 0
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`define INSTR_START 1
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`define INSTR_STROBE 2
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`define INSTR_READY 3
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`define READ_START 4
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`define READ_STROBE 5
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`define READ_DONE 6
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`define READ_VALUE 7
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`define WRITE_START 8
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`define WRITE_STROBE 9
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`define WRITE_DONE 11
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`define WRITE_DONE 10
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`define RUN_DECODE 12
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`define RUN_EXEC 13
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`define RUN_INIT 15
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/****************************
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*
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* runstate
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@ -221,7 +228,6 @@ always @(posedge clk)
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// bus
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bus_command <= `BUSCMD_NOP;
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bus_load_pc <= 0;
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// processor state machine
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@ -274,8 +280,10 @@ always @(posedge clk)
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always @(posedge clk)
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if (runstate == `RUN_INIT)
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begin
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bus_command <= `BUSCMD_LOAD_PC;
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bus_address <= PC;
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`ifdef SIM
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$display("RUN_INIT => NEXT_INSTR");
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`endif
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bus_load_pc <= 1;
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runstate <= `NEXT_INSTR;
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end
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@ -308,28 +316,68 @@ always @(posedge clk)
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//
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//--------------------------------------------------------------------------------------------------
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always @(negedge clk)
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if ((runstate == `NEXT_INSTR)&(bus_load_pc))
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/****
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* Instruction data read
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*
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*
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*/
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always @(posedge clk)
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if (runstate == `NEXT_INSTR)
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if (bus_load_pc)
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begin
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`ifdef SIM
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$display("NEXT_INSTR /clk load PC %5h", PC);
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//$display("NEXT_INSTR load PC %5h => INSTR_START", PC);
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`endif
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bus_address <= PC;
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bus_command <= `BUSCMD_LOAD_PC;
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bus_load_pc <= 0;
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runstate <= `INSTR_START;
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end
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else
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begin
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`ifdef SIM
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//$display("NEXT_INSTR => INSTR_STROBE");
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`endif
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bus_command <= `BUSCMD_PC_READ;
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runstate <= `INSTR_STROBE;
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end
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// read from rom start
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// start reading instruction
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always @(posedge clk)
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if ((runstate == `READ_START)|(runstate == `NEXT_INSTR))
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if (runstate == `INSTR_START)
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begin
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//$display("READ_START");
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`ifdef SIM
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//$display("INSTR_START => INSTR_STROBE");
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`endif
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bus_command <= `BUSCMD_PC_READ;
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runstate <= `READ_STROBE;
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runstate <= `INSTR_STROBE;
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end
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always @(posedge clk)
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if (runstate == `INSTR_STROBE)
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begin
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`ifdef SIM
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//$display("INSTR_STROBE => INSTR_READY");
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`endif
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bus_command <= `BUSCMD_NOP;
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nibble <= bus_nibble_out;
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PC <= PC + 1;
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runstate <= `INSTR_READY;
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`ifdef SIM
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//$display("PC: %h | read => %h", PC, bus_nibble_out);
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`endif
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end
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/****
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*
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* read data from bus
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*
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*/
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// read from rom clock in
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always @(negedge clk)
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always @(posedge clk)
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if (runstate == `READ_STROBE)
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begin
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//$display("READ_STROBE");
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@ -359,7 +407,7 @@ always @(posedge clk)
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always @(posedge clk)
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begin
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// first nibble instruction decoder
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if ((runstate == `READ_VALUE) & (decstate == DECODE_START))
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if ((runstate == `INSTR_READY) & (decstate == DECODE_START))
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begin
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//$display("`READ_VALUE -> instruction decoder");
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runstate <= `RUN_DECODE;
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@ -390,9 +438,9 @@ begin
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if (decstate == DECODE_0)
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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case (nibble)
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4'h3: decstate <= DECODE_RTNCC;
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4'h4: decstate <= DECODE_SETHEX;
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@ -475,9 +523,9 @@ begin
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if (decstate == DECODE_1)
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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begin
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case (nibble)
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//4'h4, 4'h5: decode_14_15();
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@ -526,9 +574,9 @@ begin
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if ((decstate == DECODE_14)|(decstate == DECODE_15))
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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case (decstate)
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DECODE_14:
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begin
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@ -554,7 +602,7 @@ begin
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default:
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begin
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`ifdef SIM
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$display("runstate %h", decstate);
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$display("DECODE_14_15: runstate %h", decstate);
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`endif
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halt <= 1;
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end
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@ -651,15 +699,15 @@ begin
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case (runstate)
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`RUN_DECODE:
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begin
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runstate <= `READ_START;
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runstate <= `INSTR_START;
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t_cnt <= 4;
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t_ctr <= 0;
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`ifdef SIM
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$write("%5h D0=(5)\t", saved_PC);
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`endif
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end
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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begin
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D0[t_ctr*4+:4] <= nibble;
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`ifdef SIM
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@ -676,13 +724,13 @@ begin
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else
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begin
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t_ctr <= t_ctr + 1;
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runstate <= `READ_START;
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runstate <= `INSTR_START;
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end
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end
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default:
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begin
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`ifdef SIM
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$display("runstate %h", runstate);
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$display("DECODE_D0_EQ_5N: runstate %h", runstate);
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`endif
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halt <= 1;
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end
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@ -696,9 +744,9 @@ begin
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if (decstate == DECODE_P_EQ)
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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begin
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P <= nibble;
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`ifdef SIM
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@ -710,7 +758,7 @@ begin
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default:
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begin
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`ifdef SIM
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$display("runstate %h", runstate);
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$display("DECODE_P_EQ: runstate %h", runstate);
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`endif
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halt <= 1;
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end
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@ -725,9 +773,9 @@ begin
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if ((decstate == DECODE_LC_LEN) | (decstate == DECODE_LC))
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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case (decstate)
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DECODE_LC_LEN:
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begin
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@ -737,7 +785,7 @@ begin
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t_cnt <= nibble;
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t_ctr <= 0;
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decstate <= DECODE_LC;
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runstate <= `READ_START;
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runstate <= `INSTR_START;
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end
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DECODE_LC:
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begin
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@ -757,7 +805,7 @@ begin
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else
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begin
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t_ctr <= (t_ctr + 1)&4'hf;
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runstate <= `READ_START;
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runstate <= `INSTR_START;
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end
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end
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default:
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@ -787,14 +835,14 @@ begin
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case (runstate)
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`RUN_DECODE:
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begin
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runstate <= `READ_START;
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runstate <= `INSTR_START;
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jump_base <= PC;
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jump_offset <= 0;
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t_cnt <= 2;
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t_ctr <= 0;
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end
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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begin
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jump_offset[t_ctr*4+:4] <= nibble;
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if (t_ctr == t_cnt)
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@ -805,7 +853,7 @@ begin
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else
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begin
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t_ctr <= t_ctr + 1;
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runstate <= `READ_START;
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runstate <= `INSTR_START;
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end
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end
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`RUN_EXEC:
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@ -821,7 +869,7 @@ begin
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default:
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begin
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`ifdef SIM
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$display("runstate %h", runstate);
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$display("DECODE_GOTO: runstate %h", runstate);
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`endif
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halt <= 1;
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end
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@ -835,9 +883,9 @@ begin
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if (decstate == DECODE_8)
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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begin
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case (nibble)
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4'h0: decstate <= DECODE_80;
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@ -859,7 +907,7 @@ begin
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default:
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begin
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`ifdef SIM
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$display("runstate %h", runstate);
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$display("DECODE_8: runstate %h", runstate);
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`endif
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halt <= 1;
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end
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@ -873,9 +921,9 @@ begin
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if (decstate == DECODE_80)
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case (runstate)
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`RUN_DECODE: runstate <= `READ_START;
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`READ_START, `READ_STROBE, `READ_DONE: begin end
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`READ_VALUE:
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`RUN_DECODE: runstate <= `INSTR_START;
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`INSTR_START, `INSTR_STROBE: begin end
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`INSTR_READY:
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begin
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case (nibble)
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4'h5: decstate <= DECODE_CONFIG;
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@ -894,7 +942,7 @@ begin
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default:
|
||||
begin
|
||||
`ifdef SIM
|
||||
$display("DECODE_80 runstate %h", runstate);
|
||||
$display("DECODE_80: runstate %h", runstate);
|
||||
`endif
|
||||
halt <= 1;
|
||||
end
|
||||
|
|
@ -940,9 +988,9 @@ begin
|
|||
|
||||
if (decstate == DECODE_C_EQ_P_N)
|
||||
case (runstate)
|
||||
`RUN_DECODE: runstate <= `READ_START;
|
||||
`READ_START, `READ_STROBE, `READ_DONE: begin end
|
||||
`READ_VALUE:
|
||||
`RUN_DECODE: runstate <= `INSTR_START;
|
||||
`INSTR_START, `INSTR_STROBE: begin end
|
||||
`INSTR_READY:
|
||||
begin
|
||||
C[nibble*4+:4] <= P;
|
||||
`ifdef SIM
|
||||
|
|
@ -970,9 +1018,9 @@ begin
|
|||
|
||||
if (decstate == DECODE_82)
|
||||
case (runstate)
|
||||
`RUN_DECODE: runstate <= `READ_START;
|
||||
`READ_START, `READ_STROBE, `READ_DONE: begin end
|
||||
`READ_VALUE:
|
||||
`RUN_DECODE: runstate <= `INSTR_START;
|
||||
`INSTR_START, `INSTR_STROBE: begin end
|
||||
`INSTR_READY:
|
||||
begin
|
||||
HST <= HST & ~nibble;
|
||||
`ifdef SIM
|
||||
|
|
@ -1004,9 +1052,9 @@ begin
|
|||
|
||||
if ((decstate == DECODE_ST_EQ_0_N) | (decstate == DECODE_ST_EQ_1_N))
|
||||
case (runstate)
|
||||
`RUN_DECODE: runstate <= `READ_START;
|
||||
`READ_START, `READ_STROBE, `READ_DONE: begin end
|
||||
`READ_VALUE:
|
||||
`RUN_DECODE: runstate <= `INSTR_START;
|
||||
`INSTR_START, `INSTR_STROBE: begin end
|
||||
`INSTR_READY:
|
||||
begin
|
||||
case (decstate)
|
||||
DECODE_ST_EQ_0_N:
|
||||
|
|
@ -1051,10 +1099,10 @@ begin
|
|||
t_ctr <= 0;
|
||||
if (decstate == DECODE_GOSBVL)
|
||||
rstk_ptr <= rstk_ptr + 1;
|
||||
runstate <= `READ_START;
|
||||
runstate <= `INSTR_START;
|
||||
end
|
||||
`READ_START, `READ_STROBE, `READ_DONE: begin end
|
||||
`READ_VALUE:
|
||||
`INSTR_START, `INSTR_STROBE: begin end
|
||||
`INSTR_READY:
|
||||
begin
|
||||
//$display("decstate %h | nibble %h", decstate, nibble);
|
||||
jump_base[t_ctr*4+:4] <= nibble;
|
||||
|
|
@ -1062,7 +1110,7 @@ begin
|
|||
else
|
||||
begin
|
||||
t_ctr <= t_ctr + 1;
|
||||
runstate <= `READ_START;
|
||||
runstate <= `INSTR_START;
|
||||
end
|
||||
end
|
||||
`RUN_EXEC:
|
||||
|
|
@ -1100,15 +1148,15 @@ begin
|
|||
|
||||
if ((decstate == DECODE_A)|(decstate == DECODE_A_FS))
|
||||
case (runstate)
|
||||
`RUN_DECODE: runstate <= `READ_START;
|
||||
`READ_START, `READ_STROBE, `READ_DONE: begin end
|
||||
`READ_VALUE:
|
||||
`RUN_DECODE: runstate <= `INSTR_START;
|
||||
`INSTR_START, `INSTR_STROBE: begin end
|
||||
`INSTR_READY:
|
||||
case (decstate)
|
||||
DECODE_A:
|
||||
begin
|
||||
t_field <= nibble;
|
||||
decstate <= DECODE_A_FS;
|
||||
runstate <= `READ_START;
|
||||
runstate <= `INSTR_START;
|
||||
end
|
||||
DECODE_A_FS:
|
||||
begin
|
||||
|
|
|
|||
Loading…
Reference in a new issue