Miroirs/hp-saturn
1
0
Fork 0
mirror of https://github.com/sxpert/hp-saturn synced 2025-01-31 19:57:50 +01:00
Code Issues Projects Releases Packages Wiki Activity

alu rewrite in progress

Browse source
This commit is contained in:
Raphael Jacquot 2019-02-22 08:22:32 +01:00
parent 93c856666e
commit 93d786c2c1
5 changed files with 747 additions and 736 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1458
saturn_alu.v
View file

File diff suppressed because it is too large Load diff

11
saturn_bus_ctrl.v
View file

@ -220,6 +220,13 @@ assign do_READ_PC_TST = !i_alu_busy && LC_pc_read;
assign do_READ_PC_0 = phase_1 && do_READ_PC_TST; assign do_READ_PC_0 = phase_1 && do_READ_PC_TST;
assign do_READ_PC_STR = do_READ_PC_TST; assign do_READ_PC_STR = do_READ_PC_TST;
/*
* common to both reading and writing to the dp pointer
*/
wire [0:0] xfr_done;
assign xfr_done = (o_data_ptr == (i_xfr_cnt + 1));
/* /*
* read from the DP pointer * read from the DP pointer
*/ */
@ -260,7 +267,7 @@ assign cmd_DP_WRITE_0 = phase_0 && cmd_DP_WRITE_TST; // sets cmd_DP_WRITE_F0
assign cmd_DP_WRITE_STR = cmd_DP_WRITE_0; assign cmd_DP_WRITE_STR = cmd_DP_WRITE_0;
assign cmd_DP_WRITE_US0 = phase_2 && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1 && o_stall_alu; assign cmd_DP_WRITE_US0 = phase_2 && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1 && o_stall_alu;
// after all nibbles were sent // after all nibbles were sent
assign cmd_DP_WRITE_1 = phase_3 && (o_data_ptr == (i_xfr_cnt + 1)) && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1; // sets cmd_DP_WRITE_F1 assign cmd_DP_WRITE_1 = phase_3 && xfr_done && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1; // sets cmd_DP_WRITE_F1
assign cmd_DP_WRITE_US1 = phase_2 && cmd_DP_WRITE_F1; assign cmd_DP_WRITE_US1 = phase_2 && cmd_DP_WRITE_F1;
assign cmd_DP_WRITE_C = phase_3 && cmd_DP_WRITE_F1; assign cmd_DP_WRITE_C = phase_3 && cmd_DP_WRITE_F1;
@ -268,7 +275,7 @@ assign cmd_DP_WRITE_C = phase_3 && cmd_DP_WRITE_F1;
wire [0:0] do_WRITE_DP_TST; wire [0:0] do_WRITE_DP_TST;
wire [0:0] do_WRITE_DP_0; wire [0:0] do_WRITE_DP_0;
wire [0:0] do_WRITE_DP_STR; wire [0:0] do_WRITE_DP_STR;
assign do_WRITE_DP_TST = !o_stall_alu && i_cmd_dp_write && LC_dp_write; assign do_WRITE_DP_TST = !o_stall_alu && i_cmd_dp_write && LC_dp_write && !xfr_done;
assign do_WRITE_DP_STR = phase_0 && do_WRITE_DP_TST; assign do_WRITE_DP_STR = phase_0 && do_WRITE_DP_TST;
assign do_WRITE_DP_0 = phase_0 && do_WRITE_DP_TST; assign do_WRITE_DP_0 = phase_0 && do_WRITE_DP_TST;

2
saturn_core.v
View file

@ -484,7 +484,7 @@ saturn_core saturn (
.o_phase (core_phase) .o_phase (core_phase)
); );
test_rom rom ( saturn_test_rom rom (
.i_phase (core_phase), .i_phase (core_phase),
.i_reset (core_bus_reset), .i_reset (core_bus_reset),

2
saturn_decoder_registers.v
View file

@ -196,7 +196,7 @@ always @(posedge i_clk) begin
if (do_block_80Cx) begin if (do_block_80Cx) begin
o_reg_dest <= `ALU_REG_C; o_reg_dest <= `ALU_REG_C;
o_reg_src1 <= `ALU_REG_P; o_reg_src1 <= `ALU_REG_P;
o_reg_src2 <= 0; o_reg_src2 <= `ALU_REG_NOPE;
end end
if (do_block_81Af0x) begin if (do_block_81Af0x) begin

8
saturn_test_rom.v
View file

@ -21,13 +21,15 @@
`ifndef _SATURN_TEST_ROM `ifndef _SATURN_TEST_ROM
`define _SATURN_TEST_ROM `define _SATURN_TEST_ROM
`include "def-buscmd.v"
/****************************************************************************** /******************************************************************************
* *
* test rom * test rom
* *
****************************************************************************/ ****************************************************************************/
module test_rom ( module saturn_test_rom (
i_phase, i_phase,
i_reset, i_reset,
@ -72,8 +74,8 @@ assign s_dp_read = (last_bus_cmd == `BUSCMD_DP_READ);
assign s_dp_write = (last_bus_cmd == `BUSCMD_DP_WRITE); assign s_dp_write = (last_bus_cmd == `BUSCMD_DP_WRITE);
initial begin initial begin
// $readmemh("rom-gx-r.hex", rom, 0, 2**`ROMBITS-1); $readmemh("rom-gx-r.hex", rom, 0, 2**`ROMBITS-1);
$readmemh("testrom-2.hex", rom, 0, 2**`ROMBITS-1); // $readmemh("testrom-2.hex", rom, 0, 2**`ROMBITS-1);
// $monitor("rst %b | strb %b | c/d %b | bus_i %h | bus_o %h | last %h | slpc %b | addr_c %0d | lpc %5h | ldp %5h", // $monitor("rst %b | strb %b | c/d %b | bus_i %h | bus_o %h | last %h | slpc %b | addr_c %0d | lpc %5h | ldp %5h",
// i_reset, i_bus_strobe, i_bus_cmd_data, i_bus_data_in, o_bus_data_out, // i_reset, i_bus_strobe, i_bus_cmd_data, i_bus_data_in, o_bus_data_out,
// last_bus_cmd, s_load_pc, addr_c, local_pc, local_dp); // last_bus_cmd, s_load_pc, addr_c, local_pc, local_dp);