add more stuff

decstates.v

@@ -10,11 +10,13 @@
 `define DEC_1X              10      //  1X
 `define DEC_14X             11      //  14X
 `define DEC_15X             12      //  15X
-`define DEC_MEMACCESS       13      //  1[45]x[y]
+`define DEC_15X_FIELD       13      //  15XX
-`define DEC_D0_EQ_5N        14      //  1B
+`define DEC_MEMACCESS       14      //  1[45]x[y]
-`define DEC_D0_EQ_5N_LOOP   15      //  1Bxxxxx (exec)
+`define DEC_D0_EQ_5N        15      //  1B
-`define DEC_D1_EQ_5N        16      //  1F
+`define DEC_D0_EQ_LOOP      16      //  1Bxxxxx (exec)
-`define DEC_D1_EQ_5N_LOOP   17      //  1Fxxxxx (exec)
+`define DEC_D1_EQ_4N        17      //  1E
+`define DEC_D1_EQ_5N        18      //  1F
+`define DEC_D1_EQ_LOOP      19      //  1[EF]xxxxx (exec)
 `define DEC_P_EQ_N          20      //  2n
 `define DEC_LC_LEN          21      //  3n...
 `define DEC_LC              22      //  3n[x]
@@ -40,6 +42,8 @@
 `define DEC_AaX_EXEC        71      //  Aax
 `define DEC_AbX_EXEC        72      //  Abx
 `define DEC_BX              80      //  Bx
-`define DEC_DX             100      //  Dx
+`define DEC_CX             192      //  Cx 
+`define DEC_DX             208      //  Dx
+`define DEC_FX             240      //  Fx
 
 `endif

hp48_01_io_ram.v

@@ -140,6 +140,9 @@ always @(posedge strobe) begin
     // read from ram
     if (can_read) begin
         nibble_out = mmio_ram[access_addr];
+`ifdef SIM
+        $display("MMIO READ %h -> %h", access_addr, nibble_out);
+`endif
 	end
 end    
 
@@ -147,6 +150,9 @@ always @(posedge strobe) begin
     // write to ram
     if (can_write) begin
         mmio_ram[access_addr] <= nibble_in;
+`ifdef SIM
+        $display("MMIO WRITE %h <- %h", access_addr, nibble_in);
+`endif
 	end
 end
 
@@ -154,17 +160,17 @@ always @(posedge strobe) begin
 	case (command)
 	`BUSCMD_PC_READ: begin
 		pc_ptr <= pc_ptr + 1;
-		$display("MMIO (%b - %5h) ACT %b - %s_PC %5h (%5h) -> %h", 
+		// $display("MMIO (%b - %5h) ACT %b - %s_PC %5h (%5h) -> %h", 
-			configured, base_addr, active,
+		// 	configured, base_addr, active,
-			cmd_read?"READ":"WRITE", ptr_value, access_addr,
+		// 	cmd_read?"READ":"WRITE", ptr_value, access_addr,
-			cmd_read?nibble_out:nibble_in);
+		// 	cmd_read?nibble_out:nibble_in);
 	end
 	`BUSCMD_DP_READ, `BUSCMD_DP_WRITE: begin
 		dp_ptr <= dp_ptr + 1;
-		$display("MMIO (%b - %5h) ACT %b - %s_DP %5h (%5h) -> %h", 
+		// $display("MMIO (%b - %5h) ACT %b - %s_DP %5h (%5h) -> %h", 
-			configured, base_addr, active,
+		// 	configured, base_addr, active,
-			cmd_read?"READ":"WRITE", ptr_value, access_addr,
+		// 	cmd_read?"READ":"WRITE", ptr_value, access_addr,
-			cmd_read?nibble_out:nibble_in);
+		// 	cmd_read?nibble_out:nibble_in);
 	end
 	`BUSCMD_LOAD_PC: begin
 		// $display("MMIO (%b - %5h) - LOAD_PC %5h", configured, base_addr, address);

hp48_02_sys_ram.v

@@ -131,9 +131,13 @@ assign write_pc = use_pc & cmd_bus_pc & cmd_write;
 assign read_dp  = use_dp & cmd_bus_dp & cmd_read;
 assign write_dp = use_dp & cmd_bus_dp & cmd_write;
 
+wire            active_pc_ptr;
+wire            active_dp_ptr;
 wire			can_read;
 wire			can_write;
 
+assign active_pc_ptr = read_pc | write_pc;
+assign active_dp_ptr = read_dp | write_dp;
 assign can_read  = configured & (read_pc | read_dp);
 assign can_write = configured & (write_pc | write_dp); 
 
@@ -144,6 +148,9 @@ always @(posedge strobe) begin
     // read from ram
     if (can_read) begin
         nibble_out = sys_ram[access_addr];
+`ifdef SIM
+        $display("SYSRAM READ %h -> %h", access_addr, nibble_out);
+`endif
 	end
 end    
 
@@ -151,6 +158,9 @@ always @(posedge strobe) begin
     // write to ram
     if (can_write) begin
         sys_ram[access_addr] <= nibble_in;
+`ifdef SIM
+        $display("SYSRAM WRITE %h <- %h", access_addr, nibble_in);
+`endif
 	end
 end
 

opcodes/00_RTNSXM.v

@@ -1,19 +0,0 @@
-/******************************************************************************
- * 00			RTNSXM
- *
- *
- */ 
-
-`include "decstates.v"
-
-begin
-    HST[0] <= 1;
-    new_PC <= RSTK[rstk_ptr];
-    RSTK[rstk_ptr] <= 0;		
-    rstk_ptr <= rstk_ptr - 1;
-    next_cycle <= `BUSCMD_LOAD_PC;
-    decstate <= `DEC_START;
-`ifdef SIM
-    $display("%05h RTNSXM", inst_start_PC);
-`endif
-end

opcodes/0x.v

@@ -6,8 +6,18 @@
 
 `DEC_0X: begin
 	case (nibble)
-	4'h0:
+	// RTNSXM
-`include "opcodes/00_RTNSXM.v"
+	4'h0: begin
+		HST[0] <= 1;
+		new_PC <= RSTK[rstk_ptr];
+		RSTK[rstk_ptr] <= 0;		
+		rstk_ptr <= rstk_ptr - 1;
+		next_cycle <= `BUSCMD_LOAD_PC;
+		decstate <= `DEC_START;
+	`ifdef SIM
+		$display("%05h RTNSXM", inst_start_PC);
+	`endif
+	end
 	4'h3:
 `include "opcodes/03_RTNCC.v"
 	4'h4:

opcodes/1[45]_memaccess.v

@@ -24,14 +24,15 @@
  `include "bus_commands.v"
  `include "fields.v"
 
-`DEC_14X: begin
+`DEC_14X, `DEC_15X: begin
     t_ptr <= nibble[0];
     t_dir <= nibble[1];
     t_reg <= nibble[2];
+    if (decstate == `DEC_14X) begin
         if (!nibble[3]) begin
             t_field <= `T_FIELD_A;  
             t_cnt <= 4;
-        t_ctr <= 0;
+            t_ctr <= 15;
         end else begin 
             t_field <= `T_FIELD_B;
             t_cnt <= 1;
@@ -39,6 +40,25 @@
         end
         next_cycle <= `BUSCMD_LOAD_DP;
         decstate <= `DEC_MEMACCESS;
+    end else begin
+        decstate <= `DEC_15X_FIELD;
+    end
+end
+
+`DEC_15X_FIELD: begin
+    case (nibble)
+    4'h0: begin
+        t_field <= `T_FIELD_P;
+        t_cnt <= P;
+        t_ctr <= (P - 1) & 4'hF;
+    end
+    default: begin
+        $display("ERROR : DEC_15X_FIELD");
+        decode_error <= 1;    
+    end
+    endcase
+    next_cycle <= `BUSCMD_LOAD_DP;
+    decstate <= `DEC_MEMACCESS;
 end
  
 `DEC_MEMACCESS: begin

opcodes/1[BF]nnnnn_D[01]_EQ_5n.v

@@ -6,20 +6,27 @@
 
 `include "decstates.v"
 
+`DEC_D1_EQ_4N,
 `DEC_D0_EQ_5N, `DEC_D1_EQ_5N: begin
-    t_cnt <= 4;
+    case (decstate)
+    `DEC_D1_EQ_4N: t_cnt <= 3;
+    `DEC_D0_EQ_5N, `DEC_D1_EQ_5N: t_cnt <= 4;
+    endcase
     t_ctr <= 1;
-    if (decstate == `DEC_D0_EQ_5N) begin
+    case (decstate)
+    `DEC_D0_EQ_5N: begin
         D0[3:0] <= nibble;    
-        decstate <= `DEC_D0_EQ_5N_LOOP;
+        decstate <= `DEC_D0_EQ_LOOP;
-    end else begin
+    end
+    `DEC_D1_EQ_4N, `DEC_D1_EQ_5N: begin
         D1[3:0] <= nibble;    
-        decstate <= `DEC_D1_EQ_5N_LOOP;
+        decstate <= `DEC_D1_EQ_LOOP;
     end
+    endcase
 end
-`DEC_D0_EQ_5N_LOOP, `DEC_D1_EQ_5N_LOOP: begin
+`DEC_D0_EQ_LOOP, `DEC_D1_EQ_LOOP: begin
     
-    if (decstate == `DEC_D0_EQ_5N_LOOP) 
+    if (decstate == `DEC_D0_EQ_LOOP) 
         D0[t_ctr*4+:4] <= nibble;
     else 
         D1[t_ctr*4+:4] <= nibble;
@@ -27,10 +34,12 @@ end
     if (t_ctr == t_cnt) begin
         decstate <= `DEC_START;
 `ifdef SIM
-        $write("%5h D%b=(5)\t%1h", inst_start_PC, (decstate == `DEC_D0_EQ_5N_LOOP), nibble);
+        $write("%5h D%b=(%1d)\t%1h", inst_start_PC, 
+            (decstate == `DEC_D0_EQ_LOOP)?1'b0:1'b1,
+            (t_cnt + 1), nibble);
         for(t_ctr = 0; t_ctr != t_cnt; t_ctr ++)
             $write("%1h", 
-                (decstate == `DEC_D0_EQ_5N_LOOP)?
+                (decstate == `DEC_D0_EQ_LOOP)?
                     D0[(t_cnt - t_ctr - 4'h1)*4+:4]:
                     D1[(t_cnt - t_ctr - 4'h1)*4+:4]
                 );

opcodes/1x.v

@@ -9,7 +9,9 @@
 `DEC_1X: begin
     case (nibble)
     4'h4: decstate <= `DEC_14X;
+    4'h5: decstate <= `DEC_15X;
     4'hB: decstate <= `DEC_D0_EQ_5N;
+    4'hE: decstate <= `DEC_D1_EQ_4N;
     4'hF: decstate <= `DEC_D1_EQ_5N;
     default: begin 
         $display("ERROR : DEC_1X");

opcodes/Cx.v

@@ -0,0 +1,26 @@
+/******************************************************************************
+ * Cx
+ * maths...
+ *
+ */ 
+
+
+`include "decstates.v"
+
+`DEC_CX: begin
+    case (nibble)
+    4'hA: begin
+        if (!hex_dec) begin
+            {Carry, A[19:0]} = A[19:0] + C[19:0];
+            decstate <= `DEC_START;
+        end 
+`ifdef SIM
+        $display("%5h A=A+C\tA%s", inst_start_PC, hex_dec?"\t\t\t <=== DEC MODE NOT IMPLEMENTED":"");
+`endif
+    end
+    default: begin 
+        $display("ERROR : DEC_CX");
+        decode_error <= 1;    
+    end
+    endcase
+end

opcodes/Fx.v

@@ -0,0 +1,39 @@
+/******************************************************************************
+ * 8
+ * a lot of things start with 8...
+ *
+ */ 
+
+
+`include "decstates.v"
+
+`DEC_FX: begin
+    case (nibble)
+    4'h8, 4'h9, 4'hA, 4'hB: begin
+        if (!hex_dec) begin
+            case (nibble)
+            4'h8: {Carry, A[19:0]} <= - A[19:0];
+            4'h9: {Carry, B[19:0]} <= - B[19:0];
+            4'hA: {Carry, C[19:0]} <= - C[19:0];
+            4'hB: {Carry, D[19:0]} <= - D[19:0];
+            endcase
+            decstate <= `DEC_START;
+        end 
+`ifdef SIM
+        $write("%5h ", inst_start_PC);
+        case (nibble)
+        4'h8: $write("A=-A");
+        4'h8: $write("B=-B");
+        4'h8: $write("C=-C");
+        4'h8: $write("D=-D");
+        endcase
+        if (!hex_dec) $display("\tA");
+        else $display("\tA\t\t\t <=== DEC MODE NOT IMPLEMENTED");
+`endif
+    end
+    default: begin 
+        $display("ERROR : DEC_FX");
+        decode_error <= 1;    
+    end
+    endcase
+end

saturn_core.v

@@ -228,7 +228,10 @@ begin
 			`BUSCMD_DP_WRITE: begin
 				bus_command <= `BUSCMD_DP_WRITE;
 				case (t_reg)
-				`T_REG_A: $display("DP_WRITE A UNIMPLEMENTED");
+				`T_REG_A: begin
+					bus_nibble_in <= A[t_ctr*4+:4];
+					$display("DP_WRITE A[%h] = %h", t_ctr, A[t_ctr*4+:4]);
+				end
 				`T_REG_C: begin
 					bus_nibble_in <= C[t_ctr*4+:4];
 					// $display("DP_WRITE C[%h] = %h", t_ctr, C[t_ctr*4+:4]);
@@ -318,7 +321,7 @@ always @(posedge ph2)
 	end
 
 always @(posedge ph3) begin
-	if (cycle_ctr == 150)
+	if (cycle_ctr == 210)
 		debug_stop <= 1;
 end
 
@@ -369,7 +372,9 @@ always @(posedge dec_strobe) begin
 			4'h8: decstate <= `DEC_8X;
 			4'hA: decstate <= `DEC_AX;
 			4'hB: decstate <= `DEC_BX;
+			4'hC: decstate <= `DEC_CX;
 			4'hD: decstate <= `DEC_DX;
+			4'hF: decstate <= `DEC_FX;
 			default: begin 
 				$display("ERROR : DEC_START");
 				decode_error <= 1;
@@ -392,7 +397,9 @@ always @(posedge dec_strobe) begin
 `include "opcodes/8[DF]xxxxx_GO.v"
 `include "opcodes/A[ab]x.v"
 `include "opcodes/Bx_math_ops_shift.v"
+`include "opcodes/Cx.v"
 `include "opcodes/Dx_regs_field_A.v"
+`include "opcodes/Fx.v"
 		default: begin
 			$display("ERROR : GENERAL");
 			decode_error <= 1;