Miroirs/hp-saturn
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attempt to change things according to ylamarre

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This commit is contained in:
Raphael Jacquot 2019-02-22 18:38:09 +01:00
parent 6126bddc90
commit 8725b736b5
2 changed files with 26 additions and 30 deletions
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52
saturn_alu.v
View file

@ -179,7 +179,7 @@ assign o_pc = PC;
*/ */
wire [1:0] phase; wire [1:0] phase;
assign phase = i_clk_ph + 3; assign phase = i_clk_ph - 2'b01;
wire [0:0] phase_0; wire [0:0] phase_0;
wire [0:0] phase_1; wire [0:0] phase_1;
@ -456,20 +456,8 @@ assign dest_ptr = dest_D0 || dest_D1;
reg [0:0] just_reset; reg [0:0] just_reset;
always @(posedge i_clk) begin always @(posedge i_clk) begin
if (just_reset && !i_reset)
if (i_reset) begin
just_reset <= 1;
f_mode_xfr <= 0;
f_mode_load_ptr <= 0;
f_mode_ldreg <= 0;
f_mode_jmp <= 0;
f_mode_alu <= 0;
end
if (just_reset && !i_reset) begin
just_reset <= 0;
$display("ALU_INIT %0d: [%d] CLEARING JUST_RESET", phase, i_cycle_ctr); $display("ALU_INIT %0d: [%d] CLEARING JUST_RESET", phase, i_cycle_ctr);
end
/* register to memory transfer /* register to memory transfer
*/ */
@ -478,19 +466,17 @@ always @(posedge i_clk) begin
$display("ALU %0d: [%d] addr_src A %b | C %b | D0 %b | D1 %b | src %2b", phase, i_cycle_ctr, $display("ALU %0d: [%d] addr_src A %b | C %b | D0 %b | D1 %b | src %2b", phase, i_cycle_ctr,
addr_src_A, addr_src_C, addr_src_D0, addr_src_D1, addr_src); addr_src_A, addr_src_C, addr_src_D0, addr_src_D1, addr_src);
$display("ALU %0d: [%d] stall the decoder",phase, i_cycle_ctr); $display("ALU %0d: [%d] stall the decoder",phase, i_cycle_ctr);
f_mode_xfr <= 1; f_mode_xfr <= 1'b1;
end end
if (alu_active && f_mode_xfr && i_bus_done) begin if (alu_active && f_mode_xfr && i_bus_done)
$display("ALU %0d: [%d] resetting variables after data transfer", phase, i_cycle_ctr); $display("ALU %0d: [%d] resetting variables after data transfer", phase, i_cycle_ctr);
f_mode_xfr <= 0;
end
/* load pointer register with value /* load pointer register with value
*/ */
if (start_in_load_ptr_mode) begin if (start_in_load_ptr_mode) begin
$display("ALU %0d: [%d] load_ptr mode started (i_ins_decoded %b)", phase, i_cycle_ctr, i_ins_decoded); $display("ALU %0d: [%d] load_ptr mode started (i_ins_decoded %b)", phase, i_cycle_ctr, i_ins_decoded);
f_mode_load_ptr <= 1; f_mode_load_ptr <= 1'b1;
end end
/* load register immediate with 1-16 nibbles /* load register immediate with 1-16 nibbles
@ -498,34 +484,44 @@ always @(posedge i_clk) begin
if (start_in_ldreg_mode) begin if (start_in_ldreg_mode) begin
$display("ALU %0d: [%d] load register mode started (loading reg %c with %0d nibbles)", $display("ALU %0d: [%d] load register mode started (loading reg %c with %0d nibbles)",
phase, i_cycle_ctr, dest_A?"A":"C", i_field_last - i_field_start + 1); phase, i_cycle_ctr, dest_A?"A":"C", i_field_last - i_field_start + 1);
f_mode_ldreg <= 1; f_mode_ldreg <= 1'b1;
end end
if (do_load_register_done) begin if (do_load_register_done)
$display("ALU %0d: [%d] resetting variables after loading register", phase, i_cycle_ctr); $display("ALU %0d: [%d] resetting variables after loading register", phase, i_cycle_ctr);
f_mode_ldreg <= 0;
end
/* a jump instruction just appeared ! /* a jump instruction just appeared !
*/ */
if (start_in_jmp_mode) begin if (start_in_jmp_mode) begin
$display("ALU %0d: [%d] jmp mode started (i_ins_decoded %b)", phase, i_cycle_ctr, i_ins_decoded); $display("ALU %0d: [%d] jmp mode started (i_ins_decoded %b)", phase, i_cycle_ctr, i_ins_decoded);
f_mode_jmp <= 1; f_mode_jmp <= 1'b1;
end end
if (do_apply_jump) begin if (do_apply_jump)
$display("ALU %0d: [%d] end of jmp mode", phase, i_cycle_ctr); $display("ALU %0d: [%d] end of jmp mode", phase, i_cycle_ctr);
f_mode_jmp <= 0;
end
/* general ALU mode (when there is no optimization) /* general ALU mode (when there is no optimization)
*/ */
if (start_in_alu_mode) begin if (start_in_alu_mode) begin
$display("ALU %0d: [%d] alu mode started (i_ins_decoded %b)", phase, i_cycle_ctr, i_ins_decoded); $display("ALU %0d: [%d] alu mode started (i_ins_decoded %b)", phase, i_cycle_ctr, i_ins_decoded);
$display("ALU %0d: [%d] stall the decoder",phase, i_cycle_ctr); $display("ALU %0d: [%d] stall the decoder",phase, i_cycle_ctr);
f_mode_alu <= 1; f_mode_alu <= 1'b1;
end end
if (i_reset ||
alu_active && f_mode_xfr && i_bus_done ||
do_load_register_done ||
do_apply_jump)
begin
f_mode_xfr <= 1'b0;
f_mode_load_ptr <= 1'b0;
f_mode_ldreg <= 1'b0;
f_mode_jmp <= 1'b0;
f_mode_alu <= 1'b0;
end
just_reset <= i_reset;
end end
/* module 1: /* module 1:

4
saturn_test_rom.v
View file

@ -73,8 +73,8 @@ assign s_dp_read = (last_bus_cmd == `BUSCMD_DP_READ);
assign s_dp_write = (last_bus_cmd == `BUSCMD_DP_WRITE); assign s_dp_write = (last_bus_cmd == `BUSCMD_DP_WRITE);
initial begin initial begin
$readmemh("rom-gx-r.hex", rom, 0, 2**`ROMBITS-1); // $readmemh("rom-gx-r.hex", rom, 0, 2**`ROMBITS-1);
// $readmemh("testrom-2.hex", rom, 0, 2**`ROMBITS-1); $readmemh("testrom-2.hex", rom, 0, 2**`ROMBITS-1);
// $monitor("rst %b | strb %b | c/d %b | bus_i %h | bus_o %h | last %h | slpc %b | addr_c %0d | lpc %5h | ldp %5h", // $monitor("rst %b | strb %b | c/d %b | bus_i %h | bus_o %h | last %h | slpc %b | addr_c %0d | lpc %5h | ldp %5h",
// i_reset, i_bus_strobe, i_bus_cmd_data, i_bus_data_in, o_bus_data_out, // i_reset, i_bus_strobe, i_bus_cmd_data, i_bus_data_in, o_bus_data_out,
// last_bus_cmd, s_load_pc, addr_c, local_pc, local_dp); // last_bus_cmd, s_load_pc, addr_c, local_pc, local_dp);