diff --git a/README b/README
new file mode 100644
index 0000000..dd31302
--- /dev/null
+++ b/README
@@ -0,0 +1,3 @@
+Verilog implementation of the HP saturn processor
+
+licence: GPLv3 or later
\ No newline at end of file
diff --git a/compile b/compile
index 095cefe..930ac4a 100755
--- a/compile
+++ b/compile
@@ -1,5 +1,7 @@
 #!/bin/bash
-#yosys -p "synth_ecp5 -top mask_gen -json mask_gen.json" mask_gen.v
-#nextpnr-ecp5 --gui --um-85k --speed 6 --freq 5 --json mask_gen.json --save mask_gen.ecp5 
+#
+# licence: GPLv3 or later
+#
+
 yosys -p "synth_ecp5 -top saturn_core -json saturn_core.json" saturn_core.v
 nextpnr-ecp5 --gui --85k --speed 6 --freq 5 --lpf ulx3s_v20.lpf --textcfg empty_lfe5u-85f.config --json saturn_core.json --save saturn_core.ecp5 
diff --git a/gen_rom_hex.py b/gen_rom_hex.py
index ec56211..ec7eee0 100755
--- a/gen_rom_hex.py
+++ b/gen_rom_hex.py
@@ -1,4 +1,7 @@
 #!/usr/bin/env python3
+#
+# licence: GPLv3 or later
+#
 
 f = open("../docs/gxrom-r", "rb")
 count=0
diff --git a/mask_gen.json b/mask_gen.json
deleted file mode 100644
index 02c5a57..0000000
--- a/mask_gen.json
+++ /dev/null
@@ -1,17634 +0,0 @@
-{
-  "creator": "Yosys 0.8+147 (git sha1 266511b2, gcc 8.2.0-7ubuntu1 -fPIC -Os)",
-  "modules": {
-    "ALU54B": {
-      "attributes": {
-        "blackbox": 1,
-        "cells_not_processed": 1,
-        "src": "/usr/local/bin/../share/yosys/ecp5/cells_bb.v:44"
-      },
-      "ports": {
-        "CLK0": {
-          "direction": "input",
-          "bits": [ 2 ]
-        },
-        "CLK1": {
-          "direction": "input",
-          "bits": [ 3 ]
-        },
-        "CLK2": {
-          "direction": "input",
-          "bits": [ 4 ]
-        },
-        "CLK3": {
-          "direction": "input",
-          "bits": [ 5 ]
-        },
-        "CE0": {
-          "direction": "input",
-          "bits": [ 6 ]
-        },
-        "CE1": {
-          "direction": "input",
-          "bits": [ 7 ]
-        },
-        "CE2": {
-          "direction": "input",
-          "bits": [ 8 ]
-        },
-        "CE3": {
-          "direction": "input",
-          "bits": [ 9 ]
-        },
-        "RST0": {
-          "direction": "input",
-          "bits": [ 10 ]
-        },
-        "RST1": {
-          "direction": "input",
-          "bits": [ 11 ]
-        },
-        "RST2": {
-          "direction": "input",
-          "bits": [ 12 ]
-        },
-        "RST3": {
-          "direction": "input",
-          "bits": [ 13 ]
-        },
-        "SIGNEDIA": {
-          "direction": "input",
-          "bits": [ 14 ]
-        },
-        "SIGNEDIB": {
-          "direction": "input",
-          "bits": [ 15 ]
-        },
-        "SIGNEDCIN": {
-          "direction": "input",
-          "bits": [ 16 ]
-        },
-        "A0": {
-          "direction": "input",
-          "bits": [ 17 ]
-        },
-        "A1": {
-          "direction": "input",
-          "bits": [ 18 ]
-        },
-        "A2": {
-          "direction": "input",
-          "bits": [ 19 ]
-        },
-        "A3": {
-          "direction": "input",
-          "bits": [ 20 ]
-        },
-        "A4": {
-          "direction": "input",
-          "bits": [ 21 ]
-        },
-        "A5": {
-          "direction": "input",
-          "bits": [ 22 ]
-        },
-        "A6": {
-          "direction": "input",
-          "bits": [ 23 ]
-        },
-        "A7": {
-          "direction": "input",
-          "bits": [ 24 ]
-        },
-        "A8": {
-          "direction": "input",
-          "bits": [ 25 ]
-        },
-        "A9": {
-          "direction": "input",
-          "bits": [ 26 ]
-        },
-        "A10": {
-          "direction": "input",
-          "bits": [ 27 ]
-        },
-        "A11": {
-          "direction": "input",
-          "bits": [ 28 ]
-        },
-        "A12": {
-          "direction": "input",
-          "bits": [ 29 ]
-        },
-        "A13": {
-          "direction": "input",
-          "bits": [ 30 ]
-        },
-        "A14": {
-          "direction": "input",
-          "bits": [ 31 ]
-        },
-        "A15": {
-          "direction": "input",
-          "bits": [ 32 ]
-        },
-        "A16": {
-          "direction": "input",
-          "bits": [ 33 ]
-        },
-        "A17": {
-          "direction": "input",
-          "bits": [ 34 ]
-        },
-        "A18": {
-          "direction": "input",
-          "bits": [ 35 ]
-        },
-        "A19": {
-          "direction": "input",
-          "bits": [ 36 ]
-        },
-        "A20": {
-          "direction": "input",
-          "bits": [ 37 ]
-        },
-        "A21": {
-          "direction": "input",
-          "bits": [ 38 ]
-        },
-        "A22": {
-          "direction": "input",
-          "bits": [ 39 ]
-        },
-        "A23": {
-          "direction": "input",
-          "bits": [ 40 ]
-        },
-        "A24": {
-          "direction": "input",
-          "bits": [ 41 ]
-        },
-        "A25": {
-          "direction": "input",
-          "bits": [ 42 ]
-        },
-        "A26": {
-          "direction": "input",
-          "bits": [ 43 ]
-        },
-        "A27": {
-          "direction": "input",
-          "bits": [ 44 ]
-        },
-        "A28": {
-          "direction": "input",
-          "bits": [ 45 ]
-        },
-        "A29": {
-          "direction": "input",
-          "bits": [ 46 ]
-        },
-        "A30": {
-          "direction": "input",
-          "bits": [ 47 ]
-        },
-        "A31": {
-          "direction": "input",
-          "bits": [ 48 ]
-        },
-        "A32": {
-          "direction": "input",
-          "bits": [ 49 ]
-        },
-        "A33": {
-          "direction": "input",
-          "bits": [ 50 ]
-        },
-        "A34": {
-          "direction": "input",
-          "bits": [ 51 ]
-        },
-        "A35": {
-          "direction": "input",
-          "bits": [ 52 ]
-        },
-        "B0": {
-          "direction": "input",
-          "bits": [ 53 ]
-        },
-        "B1": {
-          "direction": "input",
-          "bits": [ 54 ]
-        },
-        "B2": {
-          "direction": "input",
-          "bits": [ 55 ]
-        },
-        "B3": {
-          "direction": "input",
-          "bits": [ 56 ]
-        },
-        "B4": {
-          "direction": "input",
-          "bits": [ 57 ]
-        },
-        "B5": {
-          "direction": "input",
-          "bits": [ 58 ]
-        },
-        "B6": {
-          "direction": "input",
-          "bits": [ 59 ]
-        },
-        "B7": {
-          "direction": "input",
-          "bits": [ 60 ]
-        },
-        "B8": {
-          "direction": "input",
-          "bits": [ 61 ]
-        },
-        "B9": {
-          "direction": "input",
-          "bits": [ 62 ]
-        },
-        "B10": {
-          "direction": "input",
-          "bits": [ 63 ]
-        },
-        "B11": {
-          "direction": "input",
-          "bits": [ 64 ]
-        },
-        "B12": {
-          "direction": "input",
-          "bits": [ 65 ]
-        },
-        "B13": {
-          "direction": "input",
-          "bits": [ 66 ]
-        },
-        "B14": {
-          "direction": "input",
-          "bits": [ 67 ]
-        },
-        "B15": {
-          "direction": "input",
-          "bits": [ 68 ]
-        },
-        "B16": {
-          "direction": "input",
-          "bits": [ 69 ]
-        },
-        "B17": {
-          "direction": "input",
-          "bits": [ 70 ]
-        },
-        "B18": {
-          "direction": "input",
-          "bits": [ 71 ]
-        },
-        "B19": {
-          "direction": "input",
-          "bits": [ 72 ]
-        },
-        "B20": {
-          "direction": "input",
-          "bits": [ 73 ]
-        },
-        "B21": {
-          "direction": "input",
-          "bits": [ 74 ]
-        },
-        "B22": {
-          "direction": "input",
-          "bits": [ 75 ]
-        },
-        "B23": {
-          "direction": "input",
-          "bits": [ 76 ]
-        },
-        "B24": {
-          "direction": "input",
-          "bits": [ 77 ]
-        },
-        "B25": {
-          "direction": "input",
-          "bits": [ 78 ]
-        },
-        "B26": {
-          "direction": "input",
-          "bits": [ 79 ]
-        },
-        "B27": {
-          "direction": "input",
-          "bits": [ 80 ]
-        },
-        "B28": {
-          "direction": "input",
-          "bits": [ 81 ]
-        },
-        "B29": {
-          "direction": "input",
-          "bits": [ 82 ]
-        },
-        "B30": {
-          "direction": "input",
-          "bits": [ 83 ]
-        },
-        "B31": {
-          "direction": "input",
-          "bits": [ 84 ]
-        },
-        "B32": {
-          "direction": "input",
-          "bits": [ 85 ]
-        },
-        "B33": {
-          "direction": "input",
-          "bits": [ 86 ]
-        },
-        "B34": {
-          "direction": "input",
-          "bits": [ 87 ]
-        },
-        "B35": {
-          "direction": "input",
-          "bits": [ 88 ]
-        },
-        "C0": {
-          "direction": "input",
-          "bits": [ 89 ]
-        },
-        "C1": {
-          "direction": "input",
-          "bits": [ 90 ]
-        },
-        "C2": {
-          "direction": "input",
-          "bits": [ 91 ]
-        },
-        "C3": {
-          "direction": "input",
-          "bits": [ 92 ]
-        },
-        "C4": {
-          "direction": "input",
-          "bits": [ 93 ]
-        },
-        "C5": {
-          "direction": "input",
-          "bits": [ 94 ]
-        },
-        "C6": {
-          "direction": "input",
-          "bits": [ 95 ]
-        },
-        "C7": {
-          "direction": "input",
-          "bits": [ 96 ]
-        },
-        "C8": {
-          "direction": "input",
-          "bits": [ 97 ]
-        },
-        "C9": {
-          "direction": "input",
-          "bits": [ 98 ]
-        },
-        "C10": {
-          "direction": "input",
-          "bits": [ 99 ]
-        },
-        "C11": {
-          "direction": "input",
-          "bits": [ 100 ]
-        },
-        "C12": {
-          "direction": "input",
-          "bits": [ 101 ]
-        },
-        "C13": {
-          "direction": "input",
-          "bits": [ 102 ]
-        },
-        "C14": {
-          "direction": "input",
-          "bits": [ 103 ]
-        },
-        "C15": {
-          "direction": "input",
-          "bits": [ 104 ]
-        },
-        "C16": {
-          "direction": "input",
-          "bits": [ 105 ]
-        },
-        "C17": {
-          "direction": "input",
-          "bits": [ 106 ]
-        },
-        "C18": {
-          "direction": "input",
-          "bits": [ 107 ]
-        },
-        "C19": {
-          "direction": "input",
-          "bits": [ 108 ]
-        },
-        "C20": {
-          "direction": "input",
-          "bits": [ 109 ]
-        },
-        "C21": {
-          "direction": "input",
-          "bits": [ 110 ]
-        },
-        "C22": {
-          "direction": "input",
-          "bits": [ 111 ]
-        },
-        "C23": {
-          "direction": "input",
-          "bits": [ 112 ]
-        },
-        "C24": {
-          "direction": "input",
-          "bits": [ 113 ]
-        },
-        "C25": {
-          "direction": "input",
-          "bits": [ 114 ]
-        },
-        "C26": {
-          "direction": "input",
-          "bits": [ 115 ]
-        },
-        "C27": {
-          "direction": "input",
-          "bits": [ 116 ]
-        },
-        "C28": {
-          "direction": "input",
-          "bits": [ 117 ]
-        },
-        "C29": {
-          "direction": "input",
-          "bits": [ 118 ]
-        },
-        "C30": {
-          "direction": "input",
-          "bits": [ 119 ]
-        },
-        "C31": {
-          "direction": "input",
-          "bits": [ 120 ]
-        },
-        "C32": {
-          "direction": "input",
-          "bits": [ 121 ]
-        },
-        "C33": {
-          "direction": "input",
-          "bits": [ 122 ]
-        },
-        "C34": {
-          "direction": "input",
-          "bits": [ 123 ]
-        },
-        "C35": {
-          "direction": "input",
-          "bits": [ 124 ]
-        },
-        "C36": {
-          "direction": "input",
-          "bits": [ 125 ]
-        },
-        "C37": {
-          "direction": "input",
-          "bits": [ 126 ]
-        },
-        "C38": {
-          "direction": "input",
-          "bits": [ 127 ]
-        },
-        "C39": {
-          "direction": "input",
-          "bits": [ 128 ]
-        },
-        "C40": {
-          "direction": "input",
-          "bits": [ 129 ]
-        },
-        "C41": {
-          "direction": "input",
-          "bits": [ 130 ]
-        },
-        "C42": {
-          "direction": "input",
-          "bits": [ 131 ]
-        },
-        "C43": {
-          "direction": "input",
-          "bits": [ 132 ]
-        },
-        "C44": {
-          "direction": "input",
-          "bits": [ 133 ]
-        },
-        "C45": {
-          "direction": "input",
-          "bits": [ 134 ]
-        },
-        "C46": {
-          "direction": "input",
-          "bits": [ 135 ]
-        },
-        "C47": {
-          "direction": "input",
-          "bits": [ 136 ]
-        },
-        "C48": {
-          "direction": "input",
-          "bits": [ 137 ]
-        },
-        "C49": {
-          "direction": "input",
-          "bits": [ 138 ]
-        },
-        "C50": {
-          "direction": "input",
-          "bits": [ 139 ]
-        },
-        "C51": {
-          "direction": "input",
-          "bits": [ 140 ]
-        },
-        "C52": {
-          "direction": "input",
-          "bits": [ 141 ]
-        },
-        "C53": {
-          "direction": "input",
-          "bits": [ 142 ]
-        },
-        "CFB0": {
-          "direction": "input",
-          "bits": [ 143 ]
-        },
-        "CFB1": {
-          "direction": "input",
-          "bits": [ 144 ]
-        },
-        "CFB2": {
-          "direction": "input",
-          "bits": [ 145 ]
-        },
-        "CFB3": {
-          "direction": "input",
-          "bits": [ 146 ]
-        },
-        "CFB4": {
-          "direction": "input",
-          "bits": [ 147 ]
-        },
-        "CFB5": {
-          "direction": "input",
-          "bits": [ 148 ]
-        },
-        "CFB6": {
-          "direction": "input",
-          "bits": [ 149 ]
-        },
-        "CFB7": {
-          "direction": "input",
-          "bits": [ 150 ]
-        },
-        "CFB8": {
-          "direction": "input",
-          "bits": [ 151 ]
-        },
-        "CFB9": {
-          "direction": "input",
-          "bits": [ 152 ]
-        },
-        "CFB10": {
-          "direction": "input",
-          "bits": [ 153 ]
-        },
-        "CFB11": {
-          "direction": "input",
-          "bits": [ 154 ]
-        },
-        "CFB12": {
-          "direction": "input",
-          "bits": [ 155 ]
-        },
-        "CFB13": {
-          "direction": "input",
-          "bits": [ 156 ]
-        },
-        "CFB14": {
-          "direction": "input",
-          "bits": [ 157 ]
-        },
-        "CFB15": {
-          "direction": "input",
-          "bits": [ 158 ]
-        },
-        "CFB16": {
-          "direction": "input",
-          "bits": [ 159 ]
-        },
-        "CFB17": {
-          "direction": "input",
-          "bits": [ 160 ]
-        },
-        "CFB18": {
-          "direction": "input",
-          "bits": [ 161 ]
-        },
-        "CFB19": {
-          "direction": "input",
-          "bits": [ 162 ]
-        },
-        "CFB20": {
-          "direction": "input",
-          "bits": [ 163 ]
-        },
-        "CFB21": {
-          "direction": "input",
-          "bits": [ 164 ]
-        },
-        "CFB22": {
-          "direction": "input",
-          "bits": [ 165 ]
-        },
-        "CFB23": {
-          "direction": "input",
-          "bits": [ 166 ]
-        },
-        "CFB24": {
-          "direction": "input",
-          "bits": [ 167 ]
-        },
-        "CFB25": {
-          "direction": "input",
-          "bits": [ 168 ]
-        },
-        "CFB26": {
-          "direction": "input",
-          "bits": [ 169 ]
-        },
-        "CFB27": {
-          "direction": "input",
-          "bits": [ 170 ]
-        },
-        "CFB28": {
-          "direction": "input",
-          "bits": [ 171 ]
-        },
-        "CFB29": {
-          "direction": "input",
-          "bits": [ 172 ]
-        },
-        "CFB30": {
-          "direction": "input",
-          "bits": [ 173 ]
-        },
-        "CFB31": {
-          "direction": "input",
-          "bits": [ 174 ]
-        },
-        "CFB32": {
-          "direction": "input",
-          "bits": [ 175 ]
-        },
-        "CFB33": {
-          "direction": "input",
-          "bits": [ 176 ]
-        },
-        "CFB34": {
-          "direction": "input",
-          "bits": [ 177 ]
-        },
-        "CFB35": {
-          "direction": "input",
-          "bits": [ 178 ]
-        },
-        "CFB36": {
-          "direction": "input",
-          "bits": [ 179 ]
-        },
-        "CFB37": {
-          "direction": "input",
-          "bits": [ 180 ]
-        },
-        "CFB38": {
-          "direction": "input",
-          "bits": [ 181 ]
-        },
-        "CFB39": {
-          "direction": "input",
-          "bits": [ 182 ]
-        },
-        "CFB40": {
-          "direction": "input",
-          "bits": [ 183 ]
-        },
-        "CFB41": {
-          "direction": "input",
-          "bits": [ 184 ]
-        },
-        "CFB42": {
-          "direction": "input",
-          "bits": [ 185 ]
-        },
-        "CFB43": {
-          "direction": "input",
-          "bits": [ 186 ]
-        },
-        "CFB44": {
-          "direction": "input",
-          "bits": [ 187 ]
-        },
-        "CFB45": {
-          "direction": "input",
-          "bits": [ 188 ]
-        },
-        "CFB46": {
-          "direction": "input",
-          "bits": [ 189 ]
-        },
-        "CFB47": {
-          "direction": "input",
-          "bits": [ 190 ]
-        },
-        "CFB48": {
-          "direction": "input",
-          "bits": [ 191 ]
-        },
-        "CFB49": {
-          "direction": "input",
-          "bits": [ 192 ]
-        },
-        "CFB50": {
-          "direction": "input",
-          "bits": [ 193 ]
-        },
-        "CFB51": {
-          "direction": "input",
-          "bits": [ 194 ]
-        },
-        "CFB52": {
-          "direction": "input",
-          "bits": [ 195 ]
-        },
-        "CFB53": {
-          "direction": "input",
-          "bits": [ 196 ]
-        },
-        "MA0": {
-          "direction": "input",
-          "bits": [ 197 ]
-        },
-        "MA1": {
-          "direction": "input",
-          "bits": [ 198 ]
-        },
-        "MA2": {
-          "direction": "input",
-          "bits": [ 199 ]
-        },
-        "MA3": {
-          "direction": "input",
-          "bits": [ 200 ]
-        },
-        "MA4": {
-          "direction": "input",
-          "bits": [ 201 ]
-        },
-        "MA5": {
-          "direction": "input",
-          "bits": [ 202 ]
-        },
-        "MA6": {
-          "direction": "input",
-          "bits": [ 203 ]
-        },
-        "MA7": {
-          "direction": "input",
-          "bits": [ 204 ]
-        },
-        "MA8": {
-          "direction": "input",
-          "bits": [ 205 ]
-        },
-        "MA9": {
-          "direction": "input",
-          "bits": [ 206 ]
-        },
-        "MA10": {
-          "direction": "input",
-          "bits": [ 207 ]
-        },
-        "MA11": {
-          "direction": "input",
-          "bits": [ 208 ]
-        },
-        "MA12": {
-          "direction": "input",
-          "bits": [ 209 ]
-        },
-        "MA13": {
-          "direction": "input",
-          "bits": [ 210 ]
-        },
-        "MA14": {
-          "direction": "input",
-          "bits": [ 211 ]
-        },
-        "MA15": {
-          "direction": "input",
-          "bits": [ 212 ]
-        },
-        "MA16": {
-          "direction": "input",
-          "bits": [ 213 ]
-        },
-        "MA17": {
-          "direction": "input",
-          "bits": [ 214 ]
-        },
-        "MA18": {
-          "direction": "input",
-          "bits": [ 215 ]
-        },
-        "MA19": {
-          "direction": "input",
-          "bits": [ 216 ]
-        },
-        "MA20": {
-          "direction": "input",
-          "bits": [ 217 ]
-        },
-        "MA21": {
-          "direction": "input",
-          "bits": [ 218 ]
-        },
-        "MA22": {
-          "direction": "input",
-          "bits": [ 219 ]
-        },
-        "MA23": {
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-          "bits": [ 35 ]
-        },
-        "CH0_FF_TX_D_9": {
-          "direction": "input",
-          "bits": [ 36 ]
-        },
-        "CH1_FF_TX_D_9": {
-          "direction": "input",
-          "bits": [ 37 ]
-        },
-        "CH0_FF_TX_D_10": {
-          "direction": "input",
-          "bits": [ 38 ]
-        },
-        "CH1_FF_TX_D_10": {
-          "direction": "input",
-          "bits": [ 39 ]
-        },
-        "CH0_FF_TX_D_11": {
-          "direction": "input",
-          "bits": [ 40 ]
-        },
-        "CH1_FF_TX_D_11": {
-          "direction": "input",
-          "bits": [ 41 ]
-        },
-        "CH0_FF_TX_D_12": {
-          "direction": "input",
-          "bits": [ 42 ]
-        },
-        "CH1_FF_TX_D_12": {
-          "direction": "input",
-          "bits": [ 43 ]
-        },
-        "CH0_FF_TX_D_13": {
-          "direction": "input",
-          "bits": [ 44 ]
-        },
-        "CH1_FF_TX_D_13": {
-          "direction": "input",
-          "bits": [ 45 ]
-        },
-        "CH0_FF_TX_D_14": {
-          "direction": "input",
-          "bits": [ 46 ]
-        },
-        "CH1_FF_TX_D_14": {
-          "direction": "input",
-          "bits": [ 47 ]
-        },
-        "CH0_FF_TX_D_15": {
-          "direction": "input",
-          "bits": [ 48 ]
-        },
-        "CH1_FF_TX_D_15": {
-          "direction": "input",
-          "bits": [ 49 ]
-        },
-        "CH0_FF_TX_D_16": {
-          "direction": "input",
-          "bits": [ 50 ]
-        },
-        "CH1_FF_TX_D_16": {
-          "direction": "input",
-          "bits": [ 51 ]
-        },
-        "CH0_FF_TX_D_17": {
-          "direction": "input",
-          "bits": [ 52 ]
-        },
-        "CH1_FF_TX_D_17": {
-          "direction": "input",
-          "bits": [ 53 ]
-        },
-        "CH0_FF_TX_D_18": {
-          "direction": "input",
-          "bits": [ 54 ]
-        },
-        "CH1_FF_TX_D_18": {
-          "direction": "input",
-          "bits": [ 55 ]
-        },
-        "CH0_FF_TX_D_19": {
-          "direction": "input",
-          "bits": [ 56 ]
-        },
-        "CH1_FF_TX_D_19": {
-          "direction": "input",
-          "bits": [ 57 ]
-        },
-        "CH0_FF_TX_D_20": {
-          "direction": "input",
-          "bits": [ 58 ]
-        },
-        "CH1_FF_TX_D_20": {
-          "direction": "input",
-          "bits": [ 59 ]
-        },
-        "CH0_FF_TX_D_21": {
-          "direction": "input",
-          "bits": [ 60 ]
-        },
-        "CH1_FF_TX_D_21": {
-          "direction": "input",
-          "bits": [ 61 ]
-        },
-        "CH0_FF_TX_D_22": {
-          "direction": "input",
-          "bits": [ 62 ]
-        },
-        "CH1_FF_TX_D_22": {
-          "direction": "input",
-          "bits": [ 63 ]
-        },
-        "CH0_FF_TX_D_23": {
-          "direction": "input",
-          "bits": [ 64 ]
-        },
-        "CH1_FF_TX_D_23": {
-          "direction": "input",
-          "bits": [ 65 ]
-        },
-        "CH0_FFC_EI_EN": {
-          "direction": "input",
-          "bits": [ 66 ]
-        },
-        "CH1_FFC_EI_EN": {
-          "direction": "input",
-          "bits": [ 67 ]
-        },
-        "CH0_FFC_PCIE_DET_EN": {
-          "direction": "input",
-          "bits": [ 68 ]
-        },
-        "CH1_FFC_PCIE_DET_EN": {
-          "direction": "input",
-          "bits": [ 69 ]
-        },
-        "CH0_FFC_PCIE_CT": {
-          "direction": "input",
-          "bits": [ 70 ]
-        },
-        "CH1_FFC_PCIE_CT": {
-          "direction": "input",
-          "bits": [ 71 ]
-        },
-        "CH0_FFC_SB_INV_RX": {
-          "direction": "input",
-          "bits": [ 72 ]
-        },
-        "CH1_FFC_SB_INV_RX": {
-          "direction": "input",
-          "bits": [ 73 ]
-        },
-        "CH0_FFC_ENABLE_CGALIGN": {
-          "direction": "input",
-          "bits": [ 74 ]
-        },
-        "CH1_FFC_ENABLE_CGALIGN": {
-          "direction": "input",
-          "bits": [ 75 ]
-        },
-        "CH0_FFC_SIGNAL_DETECT": {
-          "direction": "input",
-          "bits": [ 76 ]
-        },
-        "CH1_FFC_SIGNAL_DETECT": {
-          "direction": "input",
-          "bits": [ 77 ]
-        },
-        "CH0_FFC_FB_LOOPBACK": {
-          "direction": "input",
-          "bits": [ 78 ]
-        },
-        "CH1_FFC_FB_LOOPBACK": {
-          "direction": "input",
-          "bits": [ 79 ]
-        },
-        "CH0_FFC_SB_PFIFO_LP": {
-          "direction": "input",
-          "bits": [ 80 ]
-        },
-        "CH1_FFC_SB_PFIFO_LP": {
-          "direction": "input",
-          "bits": [ 81 ]
-        },
-        "CH0_FFC_PFIFO_CLR": {
-          "direction": "input",
-          "bits": [ 82 ]
-        },
-        "CH1_FFC_PFIFO_CLR": {
-          "direction": "input",
-          "bits": [ 83 ]
-        },
-        "CH0_FFC_RATE_MODE_RX": {
-          "direction": "input",
-          "bits": [ 84 ]
-        },
-        "CH1_FFC_RATE_MODE_RX": {
-          "direction": "input",
-          "bits": [ 85 ]
-        },
-        "CH0_FFC_RATE_MODE_TX": {
-          "direction": "input",
-          "bits": [ 86 ]
-        },
-        "CH1_FFC_RATE_MODE_TX": {
-          "direction": "input",
-          "bits": [ 87 ]
-        },
-        "CH0_FFC_DIV11_MODE_RX": {
-          "direction": "input",
-          "bits": [ 88 ]
-        },
-        "CH1_FFC_DIV11_MODE_RX": {
-          "direction": "input",
-          "bits": [ 89 ]
-        },
-        "CH0_FFC_RX_GEAR_MODE": {
-          "direction": "input",
-          "bits": [ 90 ]
-        },
-        "CH1_FFC_RX_GEAR_MODE": {
-          "direction": "input",
-          "bits": [ 91 ]
-        },
-        "CH0_FFC_TX_GEAR_MODE": {
-          "direction": "input",
-          "bits": [ 92 ]
-        },
-        "CH1_FFC_TX_GEAR_MODE": {
-          "direction": "input",
-          "bits": [ 93 ]
-        },
-        "CH0_FFC_DIV11_MODE_TX": {
-          "direction": "input",
-          "bits": [ 94 ]
-        },
-        "CH1_FFC_DIV11_MODE_TX": {
-          "direction": "input",
-          "bits": [ 95 ]
-        },
-        "CH0_FFC_LDR_CORE2TX_EN": {
-          "direction": "input",
-          "bits": [ 96 ]
-        },
-        "CH1_FFC_LDR_CORE2TX_EN": {
-          "direction": "input",
-          "bits": [ 97 ]
-        },
-        "CH0_FFC_LANE_TX_RST": {
-          "direction": "input",
-          "bits": [ 98 ]
-        },
-        "CH1_FFC_LANE_TX_RST": {
-          "direction": "input",
-          "bits": [ 99 ]
-        },
-        "CH0_FFC_LANE_RX_RST": {
-          "direction": "input",
-          "bits": [ 100 ]
-        },
-        "CH1_FFC_LANE_RX_RST": {
-          "direction": "input",
-          "bits": [ 101 ]
-        },
-        "CH0_FFC_RRST": {
-          "direction": "input",
-          "bits": [ 102 ]
-        },
-        "CH1_FFC_RRST": {
-          "direction": "input",
-          "bits": [ 103 ]
-        },
-        "CH0_FFC_TXPWDNB": {
-          "direction": "input",
-          "bits": [ 104 ]
-        },
-        "CH1_FFC_TXPWDNB": {
-          "direction": "input",
-          "bits": [ 105 ]
-        },
-        "CH0_FFC_RXPWDNB": {
-          "direction": "input",
-          "bits": [ 106 ]
-        },
-        "CH1_FFC_RXPWDNB": {
-          "direction": "input",
-          "bits": [ 107 ]
-        },
-        "CH0_LDR_CORE2TX": {
-          "direction": "input",
-          "bits": [ 108 ]
-        },
-        "CH1_LDR_CORE2TX": {
-          "direction": "input",
-          "bits": [ 109 ]
-        },
-        "D_SCIWDATA0": {
-          "direction": "input",
-          "bits": [ 110 ]
-        },
-        "D_SCIWDATA1": {
-          "direction": "input",
-          "bits": [ 111 ]
-        },
-        "D_SCIWDATA2": {
-          "direction": "input",
-          "bits": [ 112 ]
-        },
-        "D_SCIWDATA3": {
-          "direction": "input",
-          "bits": [ 113 ]
-        },
-        "D_SCIWDATA4": {
-          "direction": "input",
-          "bits": [ 114 ]
-        },
-        "D_SCIWDATA5": {
-          "direction": "input",
-          "bits": [ 115 ]
-        },
-        "D_SCIWDATA6": {
-          "direction": "input",
-          "bits": [ 116 ]
-        },
-        "D_SCIWDATA7": {
-          "direction": "input",
-          "bits": [ 117 ]
-        },
-        "D_SCIADDR0": {
-          "direction": "input",
-          "bits": [ 118 ]
-        },
-        "D_SCIADDR1": {
-          "direction": "input",
-          "bits": [ 119 ]
-        },
-        "D_SCIADDR2": {
-          "direction": "input",
-          "bits": [ 120 ]
-        },
-        "D_SCIADDR3": {
-          "direction": "input",
-          "bits": [ 121 ]
-        },
-        "D_SCIADDR4": {
-          "direction": "input",
-          "bits": [ 122 ]
-        },
-        "D_SCIADDR5": {
-          "direction": "input",
-          "bits": [ 123 ]
-        },
-        "D_SCIENAUX": {
-          "direction": "input",
-          "bits": [ 124 ]
-        },
-        "D_SCISELAUX": {
-          "direction": "input",
-          "bits": [ 125 ]
-        },
-        "CH0_SCIEN": {
-          "direction": "input",
-          "bits": [ 126 ]
-        },
-        "CH1_SCIEN": {
-          "direction": "input",
-          "bits": [ 127 ]
-        },
-        "CH0_SCISEL": {
-          "direction": "input",
-          "bits": [ 128 ]
-        },
-        "CH1_SCISEL": {
-          "direction": "input",
-          "bits": [ 129 ]
-        },
-        "D_SCIRD": {
-          "direction": "input",
-          "bits": [ 130 ]
-        },
-        "D_SCIWSTN": {
-          "direction": "input",
-          "bits": [ 131 ]
-        },
-        "D_CYAWSTN": {
-          "direction": "input",
-          "bits": [ 132 ]
-        },
-        "D_FFC_SYNC_TOGGLE": {
-          "direction": "input",
-          "bits": [ 133 ]
-        },
-        "D_FFC_DUAL_RST": {
-          "direction": "input",
-          "bits": [ 134 ]
-        },
-        "D_FFC_MACRO_RST": {
-          "direction": "input",
-          "bits": [ 135 ]
-        },
-        "D_FFC_MACROPDB": {
-          "direction": "input",
-          "bits": [ 136 ]
-        },
-        "D_FFC_TRST": {
-          "direction": "input",
-          "bits": [ 137 ]
-        },
-        "CH0_FFC_CDR_EN_BITSLIP": {
-          "direction": "input",
-          "bits": [ 138 ]
-        },
-        "CH1_FFC_CDR_EN_BITSLIP": {
-          "direction": "input",
-          "bits": [ 139 ]
-        },
-        "D_SCAN_ENABLE": {
-          "direction": "input",
-          "bits": [ 140 ]
-        },
-        "D_SCAN_IN_0": {
-          "direction": "input",
-          "bits": [ 141 ]
-        },
-        "D_SCAN_IN_1": {
-          "direction": "input",
-          "bits": [ 142 ]
-        },
-        "D_SCAN_IN_2": {
-          "direction": "input",
-          "bits": [ 143 ]
-        },
-        "D_SCAN_IN_3": {
-          "direction": "input",
-          "bits": [ 144 ]
-        },
-        "D_SCAN_IN_4": {
-          "direction": "input",
-          "bits": [ 145 ]
-        },
-        "D_SCAN_IN_5": {
-          "direction": "input",
-          "bits": [ 146 ]
-        },
-        "D_SCAN_IN_6": {
-          "direction": "input",
-          "bits": [ 147 ]
-        },
-        "D_SCAN_IN_7": {
-          "direction": "input",
-          "bits": [ 148 ]
-        },
-        "D_SCAN_MODE": {
-          "direction": "input",
-          "bits": [ 149 ]
-        },
-        "D_SCAN_RESET": {
-          "direction": "input",
-          "bits": [ 150 ]
-        },
-        "D_CIN0": {
-          "direction": "input",
-          "bits": [ 151 ]
-        },
-        "D_CIN1": {
-          "direction": "input",
-          "bits": [ 152 ]
-        },
-        "D_CIN2": {
-          "direction": "input",
-          "bits": [ 153 ]
-        },
-        "D_CIN3": {
-          "direction": "input",
-          "bits": [ 154 ]
-        },
-        "D_CIN4": {
-          "direction": "input",
-          "bits": [ 155 ]
-        },
-        "D_CIN5": {
-          "direction": "input",
-          "bits": [ 156 ]
-        },
-        "D_CIN6": {
-          "direction": "input",
-          "bits": [ 157 ]
-        },
-        "D_CIN7": {
-          "direction": "input",
-          "bits": [ 158 ]
-        },
-        "D_CIN8": {
-          "direction": "input",
-          "bits": [ 159 ]
-        },
-        "D_CIN9": {
-          "direction": "input",
-          "bits": [ 160 ]
-        },
-        "D_CIN10": {
-          "direction": "input",
-          "bits": [ 161 ]
-        },
-        "D_CIN11": {
-          "direction": "input",
-          "bits": [ 162 ]
-        },
-        "CH0_HDOUTP": {
-          "direction": "output",
-          "bits": [ 163 ]
-        },
-        "CH1_HDOUTP": {
-          "direction": "output",
-          "bits": [ 164 ]
-        },
-        "CH0_HDOUTN": {
-          "direction": "output",
-          "bits": [ 165 ]
-        },
-        "CH1_HDOUTN": {
-          "direction": "output",
-          "bits": [ 166 ]
-        },
-        "D_TXBIT_CLKP_TO_ND": {
-          "direction": "output",
-          "bits": [ 167 ]
-        },
-        "D_TXBIT_CLKN_TO_ND": {
-          "direction": "output",
-          "bits": [ 168 ]
-        },
-        "D_SYNC_PULSE2ND": {
-          "direction": "output",
-          "bits": [ 169 ]
-        },
-        "D_TXPLL_LOL_TO_ND": {
-          "direction": "output",
-          "bits": [ 170 ]
-        },
-        "CH0_FF_RX_F_CLK": {
-          "direction": "output",
-          "bits": [ 171 ]
-        },
-        "CH1_FF_RX_F_CLK": {
-          "direction": "output",
-          "bits": [ 172 ]
-        },
-        "CH0_FF_RX_H_CLK": {
-          "direction": "output",
-          "bits": [ 173 ]
-        },
-        "CH1_FF_RX_H_CLK": {
-          "direction": "output",
-          "bits": [ 174 ]
-        },
-        "CH0_FF_TX_F_CLK": {
-          "direction": "output",
-          "bits": [ 175 ]
-        },
-        "CH1_FF_TX_F_CLK": {
-          "direction": "output",
-          "bits": [ 176 ]
-        },
-        "CH0_FF_TX_H_CLK": {
-          "direction": "output",
-          "bits": [ 177 ]
-        },
-        "CH1_FF_TX_H_CLK": {
-          "direction": "output",
-          "bits": [ 178 ]
-        },
-        "CH0_FF_RX_PCLK": {
-          "direction": "output",
-          "bits": [ 179 ]
-        },
-        "CH1_FF_RX_PCLK": {
-          "direction": "output",
-          "bits": [ 180 ]
-        },
-        "CH0_FF_TX_PCLK": {
-          "direction": "output",
-          "bits": [ 181 ]
-        },
-        "CH1_FF_TX_PCLK": {
-          "direction": "output",
-          "bits": [ 182 ]
-        },
-        "CH0_FF_RX_D_0": {
-          "direction": "output",
-          "bits": [ 183 ]
-        },
-        "CH1_FF_RX_D_0": {
-          "direction": "output",
-          "bits": [ 184 ]
-        },
-        "CH0_FF_RX_D_1": {
-          "direction": "output",
-          "bits": [ 185 ]
-        },
-        "CH1_FF_RX_D_1": {
-          "direction": "output",
-          "bits": [ 186 ]
-        },
-        "CH0_FF_RX_D_2": {
-          "direction": "output",
-          "bits": [ 187 ]
-        },
-        "CH1_FF_RX_D_2": {
-          "direction": "output",
-          "bits": [ 188 ]
-        },
-        "CH0_FF_RX_D_3": {
-          "direction": "output",
-          "bits": [ 189 ]
-        },
-        "CH1_FF_RX_D_3": {
-          "direction": "output",
-          "bits": [ 190 ]
-        },
-        "CH0_FF_RX_D_4": {
-          "direction": "output",
-          "bits": [ 191 ]
-        },
-        "CH1_FF_RX_D_4": {
-          "direction": "output",
-          "bits": [ 192 ]
-        },
-        "CH0_FF_RX_D_5": {
-          "direction": "output",
-          "bits": [ 193 ]
-        },
-        "CH1_FF_RX_D_5": {
-          "direction": "output",
-          "bits": [ 194 ]
-        },
-        "CH0_FF_RX_D_6": {
-          "direction": "output",
-          "bits": [ 195 ]
-        },
-        "CH1_FF_RX_D_6": {
-          "direction": "output",
-          "bits": [ 196 ]
-        },
-        "CH0_FF_RX_D_7": {
-          "direction": "output",
-          "bits": [ 197 ]
-        },
-        "CH1_FF_RX_D_7": {
-          "direction": "output",
-          "bits": [ 198 ]
-        },
-        "CH0_FF_RX_D_8": {
-          "direction": "output",
-          "bits": [ 199 ]
-        },
-        "CH1_FF_RX_D_8": {
-          "direction": "output",
-          "bits": [ 200 ]
-        },
-        "CH0_FF_RX_D_9": {
-          "direction": "output",
-          "bits": [ 201 ]
-        },
-        "CH1_FF_RX_D_9": {
-          "direction": "output",
-          "bits": [ 202 ]
-        },
-        "CH0_FF_RX_D_10": {
-          "direction": "output",
-          "bits": [ 203 ]
-        },
-        "CH1_FF_RX_D_10": {
-          "direction": "output",
-          "bits": [ 204 ]
-        },
-        "CH0_FF_RX_D_11": {
-          "direction": "output",
-          "bits": [ 205 ]
-        },
-        "CH1_FF_RX_D_11": {
-          "direction": "output",
-          "bits": [ 206 ]
-        },
-        "CH0_FF_RX_D_12": {
-          "direction": "output",
-          "bits": [ 207 ]
-        },
-        "CH1_FF_RX_D_12": {
-          "direction": "output",
-          "bits": [ 208 ]
-        },
-        "CH0_FF_RX_D_13": {
-          "direction": "output",
-          "bits": [ 209 ]
-        },
-        "CH1_FF_RX_D_13": {
-          "direction": "output",
-          "bits": [ 210 ]
-        },
-        "CH0_FF_RX_D_14": {
-          "direction": "output",
-          "bits": [ 211 ]
-        },
-        "CH1_FF_RX_D_14": {
-          "direction": "output",
-          "bits": [ 212 ]
-        },
-        "CH0_FF_RX_D_15": {
-          "direction": "output",
-          "bits": [ 213 ]
-        },
-        "CH1_FF_RX_D_15": {
-          "direction": "output",
-          "bits": [ 214 ]
-        },
-        "CH0_FF_RX_D_16": {
-          "direction": "output",
-          "bits": [ 215 ]
-        },
-        "CH1_FF_RX_D_16": {
-          "direction": "output",
-          "bits": [ 216 ]
-        },
-        "CH0_FF_RX_D_17": {
-          "direction": "output",
-          "bits": [ 217 ]
-        },
-        "CH1_FF_RX_D_17": {
-          "direction": "output",
-          "bits": [ 218 ]
-        },
-        "CH0_FF_RX_D_18": {
-          "direction": "output",
-          "bits": [ 219 ]
-        },
-        "CH1_FF_RX_D_18": {
-          "direction": "output",
-          "bits": [ 220 ]
-        },
-        "CH0_FF_RX_D_19": {
-          "direction": "output",
-          "bits": [ 221 ]
-        },
-        "CH1_FF_RX_D_19": {
-          "direction": "output",
-          "bits": [ 222 ]
-        },
-        "CH0_FF_RX_D_20": {
-          "direction": "output",
-          "bits": [ 223 ]
-        },
-        "CH1_FF_RX_D_20": {
-          "direction": "output",
-          "bits": [ 224 ]
-        },
-        "CH0_FF_RX_D_21": {
-          "direction": "output",
-          "bits": [ 225 ]
-        },
-        "CH1_FF_RX_D_21": {
-          "direction": "output",
-          "bits": [ 226 ]
-        },
-        "CH0_FF_RX_D_22": {
-          "direction": "output",
-          "bits": [ 227 ]
-        },
-        "CH1_FF_RX_D_22": {
-          "direction": "output",
-          "bits": [ 228 ]
-        },
-        "CH0_FF_RX_D_23": {
-          "direction": "output",
-          "bits": [ 229 ]
-        },
-        "CH1_FF_RX_D_23": {
-          "direction": "output",
-          "bits": [ 230 ]
-        },
-        "CH0_FFS_PCIE_DONE": {
-          "direction": "output",
-          "bits": [ 231 ]
-        },
-        "CH1_FFS_PCIE_DONE": {
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-          "parameters": {
-            "CEMUX": "1",
-            "CLKMUX": "CLK",
-            "GSR": "DISABLED",
-            "LSRMUX": "LSR",
-            "REGSET": "RESET"
-          },
-          "attributes": {
-            "module_not_derived": 1,
-            "src": "mask_gen.v:20|/usr/local/bin/../share/yosys/ecp5/cells_map.v:2"
-          },
-          "port_directions": {
-            "CLK": "input",
-            "DI": "input",
-            "LSR": "input",
-            "Q": "output"
-          },
-          "connections": {
-            "CLK": [ 2 ],
-            "DI": [ 92 ],
-            "LSR": [ "0" ],
-            "Q": [ 74 ]
-          }
-        },
-        "$auto$simplemap.cc:420:simplemap_dff$853": {
-          "hide_name": 1,
-          "type": "TRELLIS_FF",
-          "parameters": {
-            "CEMUX": "1",
-            "CLKMUX": "CLK",
-            "GSR": "DISABLED",
-            "LSRMUX": "LSR",
-            "REGSET": "RESET"
-          },
-          "attributes": {
-            "module_not_derived": 1,
-            "src": "mask_gen.v:20|/usr/local/bin/../share/yosys/ecp5/cells_map.v:2"
-          },
-          "port_directions": {
-            "CLK": "input",
-            "DI": "input",
-            "LSR": "input",
-            "Q": "output"
-          },
-          "connections": {
-            "CLK": [ 2 ],
-            "DI": [ 124 ],
-            "LSR": [ "0" ],
-            "Q": [ 79 ]
-          }
-        },
-        "$auto$simplemap.cc:420:simplemap_dff$854": {
-          "hide_name": 1,
-          "type": "TRELLIS_FF",
-          "parameters": {
-            "CEMUX": "1",
-            "CLKMUX": "CLK",
-            "GSR": "DISABLED",
-            "LSRMUX": "LSR",
-            "REGSET": "RESET"
-          },
-          "attributes": {
-            "module_not_derived": 1,
-            "src": "mask_gen.v:20|/usr/local/bin/../share/yosys/ecp5/cells_map.v:2"
-          },
-          "port_directions": {
-            "CLK": "input",
-            "DI": "input",
-            "LSR": "input",
-            "Q": "output"
-          },
-          "connections": {
-            "CLK": [ 2 ],
-            "DI": [ 125 ],
-            "LSR": [ "0" ],
-            "Q": [ 78 ]
-          }
-        },
-        "$auto$simplemap.cc:420:simplemap_dff$855": {
-          "hide_name": 1,
-          "type": "TRELLIS_FF",
-          "parameters": {
-            "CEMUX": "1",
-            "CLKMUX": "CLK",
-            "GSR": "DISABLED",
-            "LSRMUX": "LSR",
-            "REGSET": "RESET"
-          },
-          "attributes": {
-            "module_not_derived": 1,
-            "src": "mask_gen.v:20|/usr/local/bin/../share/yosys/ecp5/cells_map.v:2"
-          },
-          "port_directions": {
-            "CLK": "input",
-            "DI": "input",
-            "LSR": "input",
-            "Q": "output"
-          },
-          "connections": {
-            "CLK": [ 2 ],
-            "DI": [ 127 ],
-            "LSR": [ "0" ],
-            "Q": [ 80 ]
-          }
-        },
-        "$auto$simplemap.cc:420:simplemap_dff$856": {
-          "hide_name": 1,
-          "type": "TRELLIS_FF",
-          "parameters": {
-            "CEMUX": "1",
-            "CLKMUX": "CLK",
-            "GSR": "DISABLED",
-            "LSRMUX": "LSR",
-            "REGSET": "RESET"
-          },
-          "attributes": {
-            "module_not_derived": 1,
-            "src": "mask_gen.v:20|/usr/local/bin/../share/yosys/ecp5/cells_map.v:2"
-          },
-          "port_directions": {
-            "CLK": "input",
-            "DI": "input",
-            "LSR": "input",
-            "Q": "output"
-          },
-          "connections": {
-            "CLK": [ 2 ],
-            "DI": [ 128 ],
-            "LSR": [ "0" ],
-            "Q": [ 81 ]
-          }
-        },
-        "$auto$simplemap.cc:420:simplemap_dff$857": {
-          "hide_name": 1,
-          "type": "TRELLIS_FF",
-          "parameters": {
-            "CEMUX": "1",
-            "CLKMUX": "CLK",
-            "GSR": "DISABLED",
-            "LSRMUX": "LSR",
-            "REGSET": "RESET"
-          },
-          "attributes": {
-            "module_not_derived": 1,
-            "src": "mask_gen.v:20|/usr/local/bin/../share/yosys/ecp5/cells_map.v:2"
-          },
-          "port_directions": {
-            "CLK": "input",
-            "DI": "input",
-            "LSR": "input",
-            "Q": "output"
-          },
-          "connections": {
-            "CLK": [ 2 ],
-            "DI": [ 130 ],
-            "LSR": [ "0" ],
-            "Q": [ 76 ]
-          }
-        }
-      },
-      "netnames": {
-        "$0\\bitmask[15:0]": {
-          "hide_name": 1,
-          "bits": [ 94, 96, 99, 100, 102, 106, 110, 112, 114, 118, 122, 77, 84, 88, 90, 92 ],
-          "attributes": {
-            "src": "mask_gen.v:20"
-          }
-        },
-        "$0\\n_max[4:0]": {
-          "hide_name": 1,
-          "bits": [ 124, 125, 127, 128, 130 ],
-          "attributes": {
-            "src": "mask_gen.v:20"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$1005.f0": {
-          "hide_name": 1,
-          "bits": [ 86 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$1005.f1": {
-          "hide_name": 1,
-          "bits": [ 87 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$988.f0": {
-          "hide_name": 1,
-          "bits": [ 104 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$988.f1": {
-          "hide_name": 1,
-          "bits": [ 105 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$990.f0": {
-          "hide_name": 1,
-          "bits": [ 108 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$990.f1": {
-          "hide_name": 1,
-          "bits": [ 109 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$996.f0": {
-          "hide_name": 1,
-          "bits": [ 116 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$996.f1": {
-          "hide_name": 1,
-          "bits": [ 117 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$998.f0": {
-          "hide_name": 1,
-          "bits": [ 120 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$auto$blifparse.cc:492:parse_blif$998.f1": {
-          "hide_name": 1,
-          "bits": [ 121 ],
-          "attributes": {
-            "src": "/usr/local/bin/../share/yosys/ecp5/cells_map.v:77"
-          }
-        },
-        "$abc$976$n28": {
-          "hide_name": 1,
-          "bits": [ 93 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n30": {
-          "hide_name": 1,
-          "bits": [ 95 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n32": {
-          "hide_name": 1,
-          "bits": [ 98 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n33": {
-          "hide_name": 1,
-          "bits": [ 97 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n35": {
-          "hide_name": 1,
-          "bits": [ 91 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n37": {
-          "hide_name": 1,
-          "bits": [ 101 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n39": {
-          "hide_name": 1,
-          "bits": [ 103 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n41": {
-          "hide_name": 1,
-          "bits": [ 107 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n43": {
-          "hide_name": 1,
-          "bits": [ 111 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n45": {
-          "hide_name": 1,
-          "bits": [ 113 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n47": {
-          "hide_name": 1,
-          "bits": [ 115 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n49": {
-          "hide_name": 1,
-          "bits": [ 119 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n51_1": {
-          "hide_name": 1,
-          "bits": [ 75 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n53_1": {
-          "hide_name": 1,
-          "bits": [ 82 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n54_1": {
-          "hide_name": 1,
-          "bits": [ 83 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n56": {
-          "hide_name": 1,
-          "bits": [ 85 ],
-          "attributes": {
-          }
-        },
-        "$abc$976$n58": {
-          "hide_name": 1,
-          "bits": [ 89 ],
-          "attributes": {
-          }
-        },
-        "$auto$alumacc.cc:474:replace_alu$173.C": {
-          "hide_name": 1,
-          "bits": [ 132, 133, 123, 134, 126, 135 ],
-          "attributes": {
-            "src": "mask_gen.v:40|/usr/local/bin/../share/yosys/ecp5/arith_map.v:53"
-          }
-        },
-        "$auto$alumacc.cc:474:replace_alu$173.FCO": {
-          "hide_name": 1,
-          "bits": [ 136, 137, 138, 139, 129, 140 ],
-          "attributes": {
-            "src": "mask_gen.v:40|/usr/local/bin/../share/yosys/ecp5/arith_map.v:54",
-            "unused_bits": "0 1 2 3 4 5"
-          }
-        },
-        "$auto$alumacc.cc:474:replace_alu$173.Y1": {
-          "hide_name": 1,
-          "bits": [ 141, 142, 143, 144, 131, 145 ],
-          "attributes": {
-            "src": "mask_gen.v:40|/usr/local/bin/../share/yosys/ecp5/arith_map.v:54",
-            "unused_bits": "0 1 2 3 4 5"
-          }
-        },
-        "clk": {
-          "hide_name": 0,
-          "bits": [ 2 ],
-          "attributes": {
-            "src": "mask_gen.v:8"
-          }
-        },
-        "mask": {
-          "hide_name": 0,
-          "bits": [ 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74 ],
-          "attributes": {
-            "src": "mask_gen.v:11"
-          }
-        },
-        "n_max": {
-          "hide_name": 0,
-          "bits": [ 79, 78, 80, 81, 76 ],
-          "attributes": {
-            "src": "mask_gen.v:13"
-          }
-        },
-        "nibble_start": {
-          "hide_name": 0,
-          "bits": [ 7, 8, 9, 10 ],
-          "attributes": {
-            "src": "mask_gen.v:10"
-          }
-        },
-        "nibble_width": {
-          "hide_name": 0,
-          "bits": [ 3, 4, 5, 6 ],
-          "attributes": {
-            "src": "mask_gen.v:9"
-          }
-        },
-        "nm1": {
-          "hide_name": 0,
-          "bits": [ 79, 78, 80, 81 ],
-          "attributes": {
-            "src": "mask_gen.v:14"
-          }
-        }
-      }
-    }
-  }
-}
diff --git a/mask_gen.v b/mask_gen.v
deleted file mode 100644
index 2a4bbd3..0000000
--- a/mask_gen.v
+++ /dev/null
@@ -1,164 +0,0 @@
-module mask_gen (
-// ports
-    clk,
-    nibble_width,
-    nibble_start,
-    mask
-);
-input clk; // clock
-input wire [3:0] nibble_width; // length of mask in nibbles
-input wire [3:0] nibble_start; // nibble where the mask starts
-output reg [63:0] mask;// 64 bits mask
-
-reg [4:0] n_max;
-wire [3:0] nm1 = n_max[3:0];
-reg [15:0] bitmask_1;
-reg [15:0] bitmask_2;
-reg [15:0] bitmask;
-//wire [3:0] nm1;
-
-always @( posedge clk) begin
-    bitmask_1[ 0] = nibble_start==0;
-    bitmask_1[ 1] = nibble_start==1  | bitmask_1[0];
-    bitmask_1[ 2] = nibble_start==2  | bitmask_1[1];
-    bitmask_1[ 3] = nibble_start==3  | bitmask_1[2];
-    bitmask_1[ 4] = nibble_start==4  | bitmask_1[3];
-    bitmask_1[ 5] = nibble_start==5  | bitmask_1[4];
-    bitmask_1[ 6] = nibble_start==6  | bitmask_1[5];
-    bitmask_1[ 7] = nibble_start==7  | bitmask_1[6];
-    bitmask_1[ 8] = nibble_start==8  | bitmask_1[7]; 
-    bitmask_1[ 9] = nibble_start==9  | bitmask_1[8];
-    bitmask_1[10] = nibble_start==10 | bitmask_1[9];
-    bitmask_1[11] = nibble_start==11 | bitmask_1[10];
-    bitmask_1[12] = nibble_start==12 | bitmask_1[11];
-    bitmask_1[13] = nibble_start==13 | bitmask_1[12];
-    bitmask_1[14] = nibble_start==14 | bitmask_1[13];
-    bitmask_1[15] = nibble_start==15 | bitmask_1[14];
-    $display("bm1 : %b", bitmask_1);
-
-
-    n_max <= nibble_start + nibble_width + 1;
-    $display("n_max : %h", n_max);
-    //nm1[3:0] = n_max[3:0];
-
-    bitmask_2[15] = nm1==15;
-    bitmask_2[14] = nm1==14 | bitmask_2[15];
-    bitmask_2[13] = nm1==13 | bitmask_2[14];
-    bitmask_2[12] = nm1==12 | bitmask_2[13];
-    bitmask_2[11] = nm1==11 | bitmask_2[12];
-    bitmask_2[10] = nm1==10 | bitmask_2[11];
-    bitmask_2[ 9] = nm1==9  | bitmask_2[10];
-    bitmask_2[ 8] = nm1==8  | bitmask_2[9];
-    bitmask_2[ 7] = nm1==7  | bitmask_2[8];
-    bitmask_2[ 6] = nm1==6  | bitmask_2[7];
-    bitmask_2[ 5] = nm1==5  | bitmask_2[6];
-    bitmask_2[ 4] = nm1==4  | bitmask_2[5];
-    bitmask_2[ 3] = nm1==3  | bitmask_2[4];
-    bitmask_2[ 2] = nm1==2  | bitmask_2[3];
-    bitmask_2[ 1] = nm1==1  | bitmask_2[2];
-    bitmask_2[ 0] = nm1==0  | bitmask_2[1];
-    $display("bm2 : %b", bitmask_2);
-
-    bitmask = n_max[4] ? bitmask_1 | bitmask_2 : bitmask_1 & bitmask_2;
-    $display("bm  : %b", bitmask);
-
-    mask[ 3: 0] = {4{bitmask[ 0]}}; 
-    mask[ 7: 4] = {4{bitmask[ 1]}}; 
-    mask[11: 8] = {4{bitmask[ 2]}}; 
-    mask[15:12] = {4{bitmask[ 3]}}; 
-    mask[19:16] = {4{bitmask[ 4]}}; 
-    mask[23:20] = {4{bitmask[ 5]}}; 
-    mask[27:24] = {4{bitmask[ 6]}}; 
-    mask[31:28] = {4{bitmask[ 7]}}; 
-    mask[35:32] = {4{bitmask[ 8]}}; 
-    mask[39:36] = {4{bitmask[ 9]}}; 
-    mask[43:40] = {4{bitmask[10]}}; 
-    mask[47:44] = {4{bitmask[11]}}; 
-    mask[51:48] = {4{bitmask[12]}}; 
-    mask[55:52] = {4{bitmask[13]}}; 
-    mask[59:56] = {4{bitmask[14]}}; 
-    mask[63:60] = {4{bitmask[15]}}; 
-end
-
-endmodule
-
-`ifdef SIM
-
-//`timescale 1 ns / 100 ps
-
-module mask_gen_tb;
-
-// inputs
-reg clock;
-
-reg [3:0] nw;
-reg [3:0] ns;
-// outputs
-wire [63:0] m;
-
-
-mask_gen U0 (
-    .clk (clock),
-    .nibble_width (nw),
-    .nibble_start (ns),
-    .mask (m)
-);
-
-
-always 
-    #10 clock = (clock === 1'b0);
-
-initial begin
-    //$monitor ("clk %b", clock);
-    $monitor ("clk %b | nw %d | ns %d | m %h", clock, nw, ns, m);
-    //#10 $display("1");
-    //#10 $display("2");
-    //#10 $finish;
-end 
-
-
-initial begin
-    $dumpfile("text.vcd");
-    $dumpvars(clock, nw, ns, m);
-    $display($time, "starting simulation");
-    clock = 0;
-    $display("starting the simulation");
-    run_mask_gen(4, 0);
-    run_mask_gen(4, 1);
-    run_mask_gen(4, 2);
-    run_mask_gen(4, 3);
-    run_mask_gen(4, 4);
-    run_mask_gen(4, 5);
-    run_mask_gen(4, 6);
-    run_mask_gen(4, 7);
-    run_mask_gen(4, 8);
-    run_mask_gen(4, 9);
-    run_mask_gen(4,10);
-    run_mask_gen(4,11);
-    run_mask_gen(4,12);
-    run_mask_gen(4,13);
-    run_mask_gen(4,14);
-    run_mask_gen(4,15);
-
-    //run_mask_gen(4, 0);
-    //run_mask_gen(4, 0);
-    //run_mask_gen(4, 0);
-    //run_mask_gen(4, 0);
-    $finish;
-end
-
-
-task run_mask_gen;
-    input [3:0] _nw;
-    input [3:0] _ns;
-    begin
-        $display("running", _nw, _ns);
-        @(posedge clock);
-        nw = _nw;
-        ns = _ns;
-    end
-endtask
-
-endmodule
-
-`endif
diff --git a/mask_gen_tb b/mask_gen_tb
deleted file mode 100755
index 3766486..0000000
--- a/mask_gen_tb
+++ /dev/null
@@ -1,645 +0,0 @@
-#! /usr/bin/vvp -v
-:ivl_version "10.1 (stable)";
-:ivl_delay_selection "TYPICAL";
-:vpi_time_precision + 0;
-:vpi_module "system";
-:vpi_module "vhdl_sys";
-:vpi_module "v2005_math";
-:vpi_module "va_math";
-S_0x562a0b875c60 .scope module, "mask_gen_tb" "mask_gen_tb" 2 89;
- .timescale 0 0;
-v0x562a0b8968d0_0 .var "clock", 0 0;
-v0x562a0b896990_0 .net "m", 63 0, v0x562a0b896040_0;  1 drivers
-v0x562a0b896a60_0 .var "ns", 3 0;
-v0x562a0b896b60_0 .var "nw", 3 0;
-S_0x562a0b875de0 .scope module, "U0" "mask_gen" 2 100, 2 1 0, S_0x562a0b875c60;
- .timescale 0 0;
-    .port_info 0 /INPUT 1 "clk"
-    .port_info 1 /INPUT 4 "nibble_width"
-    .port_info 2 /INPUT 4 "nibble_start"
-    .port_info 3 /OUTPUT 64 "mask"
-v0x562a0b85f770_0 .var "bitmask", 15 0;
-v0x562a0b895de0_0 .var "bitmask_1", 15 0;
-v0x562a0b895ec0_0 .var "bitmask_2", 15 0;
-v0x562a0b895f80_0 .net "clk", 0 0, v0x562a0b8968d0_0;  1 drivers
-v0x562a0b896040_0 .var "mask", 63 0;
-v0x562a0b896170_0 .var "n_max", 4 0;
-v0x562a0b896250_0 .net "nibble_start", 3 0, v0x562a0b896a60_0;  1 drivers
-v0x562a0b896330_0 .net "nibble_width", 3 0, v0x562a0b896b60_0;  1 drivers
-v0x562a0b896410_0 .net "nm1", 3 0, L_0x562a0b896c30;  1 drivers
-E_0x562a0b8468f0 .event posedge, v0x562a0b895f80_0;
-L_0x562a0b896c30 .part v0x562a0b896170_0, 0, 4;
-S_0x562a0b896570 .scope task, "run_mask_gen" "run_mask_gen" 2 151, 2 151 0, S_0x562a0b875c60;
- .timescale 0 0;
-v0x562a0b896710_0 .var "_ns", 3 0;
-v0x562a0b8967f0_0 .var "_nw", 3 0;
-TD_mask_gen_tb.run_mask_gen ;
-    %vpi_call 2 155 "$display", "running", v0x562a0b8967f0_0, v0x562a0b896710_0 {0 0 0};
-    %wait E_0x562a0b8468f0;
-    %load/vec4 v0x562a0b8967f0_0;
-    %store/vec4 v0x562a0b896b60_0, 0, 4;
-    %load/vec4 v0x562a0b896710_0;
-    %store/vec4 v0x562a0b896a60_0, 0, 4;
-    %end;
-    .scope S_0x562a0b875de0;
-T_1 ;
-    %wait E_0x562a0b8468f0;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 0, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %ix/load 4, 0, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 1, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 0, 2;
-    %or;
-    %ix/load 4, 1, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 2, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 1, 2;
-    %or;
-    %ix/load 4, 2, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 3, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 2, 3;
-    %or;
-    %ix/load 4, 3, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 4, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 3, 3;
-    %or;
-    %ix/load 4, 4, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 5, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 4, 4;
-    %or;
-    %ix/load 4, 5, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 6, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 5, 4;
-    %or;
-    %ix/load 4, 6, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 7, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 6, 4;
-    %or;
-    %ix/load 4, 7, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 8, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 7, 4;
-    %or;
-    %ix/load 4, 8, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 9, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 8, 5;
-    %or;
-    %ix/load 4, 9, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 10, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 9, 5;
-    %or;
-    %ix/load 4, 10, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 11, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 10, 5;
-    %or;
-    %ix/load 4, 11, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 12, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 11, 5;
-    %or;
-    %ix/load 4, 12, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 13, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 12, 5;
-    %or;
-    %ix/load 4, 13, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 14, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 13, 5;
-    %or;
-    %ix/load 4, 14, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 32;
-    %pushi/vec4 15, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895de0_0;
-    %parti/s 1, 14, 5;
-    %or;
-    %ix/load 4, 15, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895de0_0, 4, 1;
-    %vpi_call 2 37 "$display", "bm1 : %b", v0x562a0b895de0_0 {0 0 0};
-    %load/vec4 v0x562a0b896250_0;
-    %pad/u 5;
-    %load/vec4 v0x562a0b896330_0;
-    %pad/u 5;
-    %add;
-    %addi 1, 0, 5;
-    %assign/vec4 v0x562a0b896170_0, 0;
-    %vpi_call 2 41 "$display", "n_max : %h", v0x562a0b896170_0 {0 0 0};
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 15, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %ix/load 4, 15, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 14, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 15, 5;
-    %or;
-    %ix/load 4, 14, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 13, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 14, 5;
-    %or;
-    %ix/load 4, 13, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 12, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 13, 5;
-    %or;
-    %ix/load 4, 12, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 11, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 12, 5;
-    %or;
-    %ix/load 4, 11, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 10, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 11, 5;
-    %or;
-    %ix/load 4, 10, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 9, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 10, 5;
-    %or;
-    %ix/load 4, 9, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 8, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 9, 5;
-    %or;
-    %ix/load 4, 8, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 7, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 8, 5;
-    %or;
-    %ix/load 4, 7, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 6, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 7, 4;
-    %or;
-    %ix/load 4, 6, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 5, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 6, 4;
-    %or;
-    %ix/load 4, 5, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 4, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 5, 4;
-    %or;
-    %ix/load 4, 4, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 3, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 4, 4;
-    %or;
-    %ix/load 4, 3, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 2, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 3, 3;
-    %or;
-    %ix/load 4, 2, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 1, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 2, 3;
-    %or;
-    %ix/load 4, 1, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %load/vec4 v0x562a0b896410_0;
-    %pad/u 32;
-    %pushi/vec4 0, 0, 32;
-    %cmp/e;
-    %flag_get/vec4 4;
-    %load/vec4 v0x562a0b895ec0_0;
-    %parti/s 1, 1, 2;
-    %or;
-    %ix/load 4, 0, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b895ec0_0, 4, 1;
-    %vpi_call 2 60 "$display", "bm2 : %b", v0x562a0b895ec0_0 {0 0 0};
-    %load/vec4 v0x562a0b896170_0;
-    %parti/s 1, 4, 4;
-    %flag_set/vec4 8;
-    %jmp/0 T_1.0, 8;
-    %load/vec4 v0x562a0b895de0_0;
-    %load/vec4 v0x562a0b895ec0_0;
-    %or;
-    %jmp/1 T_1.1, 8;
-T_1.0 ; End of true expr.
-    %load/vec4 v0x562a0b895de0_0;
-    %load/vec4 v0x562a0b895ec0_0;
-    %and;
-    %jmp/0 T_1.1, 8;
- ; End of false expr.
-    %blend;
-T_1.1;
-    %store/vec4 v0x562a0b85f770_0, 0, 16;
-    %vpi_call 2 63 "$display", "bm  : %b", v0x562a0b85f770_0 {0 0 0};
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 0, 2;
-    %replicate 4;
-    %ix/load 4, 0, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 1, 2;
-    %replicate 4;
-    %ix/load 4, 4, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 2, 3;
-    %replicate 4;
-    %ix/load 4, 8, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 3, 3;
-    %replicate 4;
-    %ix/load 4, 12, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 4, 4;
-    %replicate 4;
-    %ix/load 4, 16, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 5, 4;
-    %replicate 4;
-    %ix/load 4, 20, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 6, 4;
-    %replicate 4;
-    %ix/load 4, 24, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 7, 4;
-    %replicate 4;
-    %ix/load 4, 28, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 8, 5;
-    %replicate 4;
-    %ix/load 4, 32, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 9, 5;
-    %replicate 4;
-    %ix/load 4, 36, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 10, 5;
-    %replicate 4;
-    %ix/load 4, 40, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 11, 5;
-    %replicate 4;
-    %ix/load 4, 44, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 12, 5;
-    %replicate 4;
-    %ix/load 4, 48, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 13, 5;
-    %replicate 4;
-    %ix/load 4, 52, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 14, 5;
-    %replicate 4;
-    %ix/load 4, 56, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %load/vec4 v0x562a0b85f770_0;
-    %parti/s 1, 15, 5;
-    %replicate 4;
-    %ix/load 4, 60, 0;
-    %flag_set/imm 4, 0;
-    %store/vec4 v0x562a0b896040_0, 4, 4;
-    %jmp T_1;
-    .thread T_1;
-    .scope S_0x562a0b875c60;
-T_2 ;
-    %delay 10, 0;
-    %load/vec4 v0x562a0b8968d0_0;
-    %pushi/vec4 0, 0, 1;
-    %cmp/e;
-    %flag_get/vec4 6;
-    %store/vec4 v0x562a0b8968d0_0, 0, 1;
-    %jmp T_2;
-    .thread T_2;
-    .scope S_0x562a0b875c60;
-T_3 ;
-    %vpi_call 2 113 "$monitor", "clk %b | nw %d | ns %d | m %h", v0x562a0b8968d0_0, v0x562a0b896b60_0, v0x562a0b896a60_0, v0x562a0b896990_0 {0 0 0};
-    %end;
-    .thread T_3;
-    .scope S_0x562a0b875c60;
-T_4 ;
-    %vpi_call 2 121 "$dumpfile", "text.vcd" {0 0 0};
-    %vpi_call 2 122 "$dumpvars", v0x562a0b8968d0_0, v0x562a0b896b60_0, v0x562a0b896a60_0, v0x562a0b896990_0 {0 0 0};
-    %vpi_call 2 123 "$display", $time, "starting simulation" {0 0 0};
-    %pushi/vec4 0, 0, 1;
-    %store/vec4 v0x562a0b8968d0_0, 0, 1;
-    %vpi_call 2 125 "$display", "starting the simulation" {0 0 0};
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 0, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 1, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 2, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 3, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 5, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 6, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 7, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 8, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 9, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 10, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 11, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 12, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 13, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 14, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %pushi/vec4 4, 0, 4;
-    %store/vec4 v0x562a0b8967f0_0, 0, 4;
-    %pushi/vec4 15, 0, 4;
-    %store/vec4 v0x562a0b896710_0, 0, 4;
-    %fork TD_mask_gen_tb.run_mask_gen, S_0x562a0b896570;
-    %join;
-    %vpi_call 2 147 "$finish" {0 0 0};
-    %end;
-    .thread T_4;
-# The file index is used to find the file name in the following table.
-:file_names 3;
-    "N/A";
-    "<interactive>";
-    "mask_gen.v";
diff --git a/run b/run
index 18bee2e..208f397 100755
--- a/run
+++ b/run
@@ -1,4 +1,7 @@
 #!/bin/bash
+#
+# licence: GPLv3 or later
+# 
 verilator -Wall -cc saturn_core.v
 VERILATOR_STATUS=$?
 if [ "VERILATOR_STATUS" != "0" ]
diff --git a/saturn_core.v b/saturn_core.v
index 7944194..1f4c179 100644
--- a/saturn_core.v
+++ b/saturn_core.v
@@ -1,3 +1,7 @@
+/*
+ * Licence: GPLv3 or later
+ */
+
 `default_nettype none //
 
 /**************************************************************************************************
@@ -43,17 +47,24 @@ endmodule
  *
  *
  */
+`define BUSCMD_NOP			0
+`define BUSCMD_DP_WRITE		5
+`define BUSCMD_CONFIGURE	8
+
 
 module hp48_io_ram (
 	input			clk,
 	input	[19:0]	address,
-	input			configure,
-	input			write,
+	input	[3:0]	command,
 	input	[3:0]	nibble_in,
 	output	[3:0]	nibble_out
 );
 
-localparam IO_RAM_LEN	= 64;
+localparam IO_RAM_LEN		= 64;
+
+// localparam BUSCMD_DP_WRITE	= C_BUSCMD_DP_WRITE;
+// localparam BUSCMD_CONFIGURE = C_BUSCMD_CONFIGURE;
+
 
 reg			configured;
 reg [19:0]	base_addr;
@@ -85,8 +96,19 @@ initial
 `endif
 	end
 
-//always @(posedge clk)
-
+always @(posedge clk)
+	case (command)
+		`BUSCMD_NOP: begin end				// do nothing	
+		`BUSCMD_CONFIGURE:
+			begin
+`ifdef SIM
+				$display("io_ram: configure at %5h len %d", address, IO_RAM_LEN);
+`endif
+				base_addr <= address;
+			end
+		default:
+				$display("io_ram: unhandled command %h", command);
+	endcase
 
 endmodule
 
@@ -128,6 +150,11 @@ assign reset		= btn[1];
 localparam	REGDMP_HEX		= 8'h00;
 
 
+// bus commands
+
+// localparam BUSCMD_DP_WRITE	= `C_BUSCMD_DP_WRITE;
+// localparam BUSCMD_CONFIGURE = `C_BUSCMD_CONFIGURE;
+
 // runstate
 
 localparam RUN_START	= 0;
@@ -217,13 +244,12 @@ reg [7:0]	regdump;
 
 // memory access
 //reg			rom_clock;
-reg	[19:0]	rom_address;
-reg			rom_enable;
-wire[3:0]	rom_nibble;
+reg	[19:0]		rom_address;
+reg				rom_enable;
+wire[3:0]		rom_nibble;
 
 // io_ram access
-reg				io_configure;
-reg				io_write;
+reg		[3:0]	bus_command;
 reg		[3:0]	nibble_in;
 wire	[3:0]	nibble_out;
 
@@ -275,8 +301,7 @@ hp_rom calc_rom (
 hp48_io_ram io_ram (
 	.clk		(clk),
 	.address	(rom_address),
-	.configure	(io_configure),
-	.write		(io_write),
+	.command	(bus_command),
 	.nibble_in	(nibble_in),
 	.nibble_out	(nibble_out)
 );
@@ -291,6 +316,19 @@ begin
 
 	if (reset)
 		begin
+			// bus
+
+			bus_command <= `BUSCMD_NOP;
+			
+			// processor state machine
+			
+			halt		<= 0;
+			runstate	<= RUN_START;
+			decstate 	<= DECODE_START;
+			regdump		<= REGDMP_HEX;
+
+			// processor registers
+
 			hex_dec		<= HEX;
 			rstk_ptr	<= 7;
 
@@ -323,10 +361,6 @@ begin
 			R3			<= 0;
 			R4			<= 0;
 
-			halt		<= 0;
-			runstate	<= RUN_START;
-			decstate 	<= DECODE_START;
-			regdump		<= REGDMP_HEX;
 		end
 	else
 		if (runstate == RUN_START) 
@@ -389,6 +423,10 @@ begin
 			runstate <= READ_ROM_VAL;
 		end
 
+	if (runstate == WRITE_STA)
+		begin
+			bus_command <= `BUSCMD_DP_WRITE;
+		end
 
 //--------------------------------------------------------------------------------------------------
 //