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fix off-by-one error in write loop

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This commit is contained in:
Raphael Jacquot 2019-02-21 17:10:03 +01:00
parent 30d7e6c8df
commit 7e6250f59b
2 changed files with 7 additions and 6 deletions
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7
saturn_alu.v
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@ -391,7 +391,8 @@ assign xfr_data_copy = xfr_data_init || xfr_init_done && !xfr_data_done && !
*/
wire [3:0] src1_ptr;
assign src1_ptr = ( {4{copy_address}} & data_counter );
assign src1_ptr = ( {4{copy_address}} & data_counter |
{4{xfr_data_copy}} & xfr_data_ctr );
always @(posedge i_clk) begin
@ -419,7 +420,6 @@ always @(posedge i_clk) begin
end
if (copy_address) begin
$display("ALU %0d: [%d] copy address f_mode_xfr %b && !copy_done %b && !xfr_init_done %b", phase, i_cycle_ctr, f_mode_xfr, !copy_done, !xfr_init_done);
$write("ALU %0d: [%d] xfr_data[%0d] = ", phase, i_cycle_ctr, data_counter);
case (addr_src)
2'b00: begin
@ -449,8 +449,9 @@ always @(posedge i_clk) begin
xfr_init_done <= 1;
end
// need to copy actual data, LOL
if (xfr_data_copy) begin
$display("ALU %0d: [%d] copy data | dc %h | xdc %h | xdd %b",phase, i_cycle_ctr, data_counter, xfr_data_ctr, xfr_data_done);
$display("ALU %0d: [%d] copy data | dc %h | xdc %h | s1p %h | xdd %b",phase, i_cycle_ctr, data_counter, xfr_data_ctr, src1_ptr, xfr_data_done);
data_counter <= data_counter + 1;
end

6
saturn_bus_ctrl.v
View file

@ -260,7 +260,7 @@ assign cmd_DP_WRITE_0 = phase_0 && cmd_DP_WRITE_TST; // sets cmd_DP_WRITE_F0
assign cmd_DP_WRITE_STR = cmd_DP_WRITE_0;
assign cmd_DP_WRITE_US0 = phase_2 && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1 && o_stall_alu;
// after all nibbles were sent
assign cmd_DP_WRITE_1 = phase_3 && (o_data_ptr == i_xfr_cnt) && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1; // sets cmd_DP_WRITE_F1
assign cmd_DP_WRITE_1 = phase_3 && (o_data_ptr == (i_xfr_cnt + 1)) && cmd_DP_WRITE_F0 && !cmd_DP_WRITE_F1; // sets cmd_DP_WRITE_F1
assign cmd_DP_WRITE_US1 = phase_2 && cmd_DP_WRITE_F1;
assign cmd_DP_WRITE_C = phase_3 && cmd_DP_WRITE_F1;
@ -760,9 +760,9 @@ always @(posedge i_clk) begin
end
if (do_WRITE_DP_0) begin
$display("BUS_CTRL %1d: [%d] WRITE %h (%0d to go)", i_phase, i_cycle_ctr, i_data_nibl, i_xfr_cnt - o_data_ptr);
$display("BUS_CTRL %1d: [%d] WRITE %h %0d/%0d (%0d to go)", i_phase, i_cycle_ctr, i_data_nibl, o_data_ptr, i_xfr_cnt, i_xfr_cnt - o_data_ptr);
o_bus_data <= i_data_nibl;
o_data_ptr <= (o_data_ptr == i_xfr_cnt)?o_data_ptr: o_data_ptr + 1;
o_data_ptr <= o_data_ptr + 1;
end
if (do_read_stalled_by_alu) begin