hide some display instructions

This commit is contained in:
Raphael Jacquot 2019-02-16 12:26:24 +01:00
parent ea3f53f70d
commit 781d15e0c7
3 changed files with 25 additions and 2 deletions

View file

@ -32,3 +32,4 @@ second delay is posedge $glbnet$clk -> <async>
2019-02-15 11:07 577 102.13MHz 28.63ns 11.09ns 3270 101.77MHz 13.65ns 3.67ns
2019-02-15 17:12 1544 70.76MHz 33.39ns 12.77ns 10374 75.73MHz 16.74ns 3.99ns
2019-02-16 11:18 1552 72.00MHz 34.10ns 10.85ns 10072 75.65MHz 17.35ns 3.46ns
2019-02-16 12:18 1453 62.31MHz 33.86ns 12.05ns 10323 70.66MHz 16.96ns 3.59ns

View file

@ -467,7 +467,9 @@ always @(posedge i_clk) begin
block_13x <= 1;
4'h4, 4'h5: // DAT[01]=[AC] <field>
begin
`ifdef SIM
$display("block_1x %h | use table <= %b", i_nibble, i_nibble[0]);
`endif
block_14x_15xx <= 1;
use_fields_tbl <= i_nibble[0];
end
@ -520,9 +522,11 @@ always @(posedge i_clk) begin
end
if (do_block_14x_15xx) begin
`ifdef SIM
$display("block_14x_15xx nibble %h | use_tbl %b", i_nibble, use_fields_tbl);
// o_alu_debug <= 1;
$display("fields_table %d",i_nibble[3]?`FT_TABLE_value:`FT_TABLE_a);
`endif
// o_alu_debug <= 1;
o_fields_table <= i_nibble[3]?`FT_TABLE_value:`FT_TABLE_a;
o_alu_op <= `ALU_OP_COPY;
go_fields_table <= use_fields_tbl;
@ -537,7 +541,9 @@ always @(posedge i_clk) begin
end
if (do_block_15xx) begin
`ifdef SIM
$display("block_15xx %h", i_nibble);
`endif
o_alu_debug <= 1;
o_ins_alu_op <= 1;
o_ins_decoded <= 1;
@ -586,7 +592,9 @@ always @(posedge i_clk) begin
end
if (do_block_Aax) begin
`ifdef SIM
$display("block_Aax %h", i_nibble);
`endif
o_dec_error <= 1;
end
@ -602,7 +610,9 @@ always @(posedge i_clk) begin
end
if (do_block_Cx) begin
`ifdef SIM
$display("block_Cx %h", i_nibble);
`endif
o_fields_table <= `FT_TABLE_f;
o_ins_alu_op <= 1;
o_alu_op <= (i_nibble[3] && i_nibble[2])?`ALU_OP_DEC:`ALU_OP_ADD;
@ -616,7 +626,9 @@ always @(posedge i_clk) begin
end
if (do_block_Dx) begin
`ifdef SIM
$display("block_Dx %h", i_nibble);
`endif
o_fields_table <= `FT_TABLE_f;
o_ins_alu_op <= 1;
o_alu_op <= (i_nibble[3] && i_nibble[2])?`ALU_OP_EXCH:`ALU_OP_COPY;
@ -640,7 +652,9 @@ always @(posedge i_clk) begin
o_ins_decoded <= 1;
end
default: begin
`ifdef SIM
$display("block_Fx %h error", i_nibble);
`endif
o_dec_error <= 1;
end
endcase

View file

@ -1,7 +1,9 @@
if (do_block_8x) begin
`ifdef SIM
$display("block_8x %h | op %d", i_nibble, o_alu_op);
`endif
case (i_nibble)
4'h0: //
block_80x <= 1;
@ -34,7 +36,9 @@
`endif
end
default: begin
`ifdef SIM
$display("block_8x %h error", i_nibble);
`endif
o_dec_error <= 1;
end
endcase
@ -42,7 +46,9 @@
end
if (do_block_80x) begin
`ifdef SIM
$display("block_80x %h | op %d", i_nibble, o_alu_op);
`endif
case (i_nibble)
4'h5: begin // CONFIG
next_nibble <= 0;
@ -54,7 +60,9 @@
end
4'hC: block_80Cx <= 1;
default: begin
`ifdef SIM
$display("block_80x %h error", i_nibble);
`endif
o_dec_error <= 1;
end
endcase