diff --git a/saturn_bus.v b/saturn_bus.v
index 123e236..e8aa6d8 100644
--- a/saturn_bus.v
+++ b/saturn_bus.v
@@ -237,7 +237,7 @@ always @(posedge i_clk) begin
     end 
 
 `ifdef SIM
-    if (cycle_ctr == 320) begin
+    if (cycle_ctr == 370) begin
         bus_halt <= 1'b1;
         $display("BUS      %0d: [%d] enough cycles for now", phase, cycle_ctr);
     end
diff --git a/saturn_bus_controller.v b/saturn_bus_controller.v
index 2986214..15f7987 100644
--- a/saturn_bus_controller.v
+++ b/saturn_bus_controller.v
@@ -289,9 +289,11 @@ always @(posedge i_clk) begin
                         bus_busy <= 1'b1;
 
                         /* data for the debugger */
-                        dbg_bus_info   <= 1'b1; 
-                        dbg_bus_action <= { 1'b0, ctrl_unit_prog_data[4]};
-                        dbg_bus_data   <= ctrl_unit_prog_data[3:0];
+                        if (!ctrl_unit_prog_data[5]) begin
+                            dbg_bus_info   <= 1'b1; 
+                            dbg_bus_action <= { 1'b0, ctrl_unit_prog_data[4]};
+                            dbg_bus_data   <= ctrl_unit_prog_data[3:0];
+                        end
                     end 
                     /*
                      * nothing to send, see if we can read, and do it
@@ -324,8 +326,8 @@ always @(posedge i_clk) begin
                         bus_busy <= 1'b0;
                     end
 
-                    /* at that poing, weread data in for the debugger */
-                    if (!bus_busy && !alu_busy) begin
+                    /* at that poing, we read data in for the debugger */
+                    if ((!bus_busy && !alu_busy) || bus_read) begin
                         dbg_bus_info   <= 1'b1;
                         dbg_bus_action <= 2'b10;
                         dbg_bus_data   <= i_bus_nibble_in;