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https://github.com/sxpert/hp-saturn
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more work on ALU
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parent
799fc3c327
commit
43dd894888
2 changed files with 21 additions and 4 deletions
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@ -30,4 +30,8 @@
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next_cycle <= `BUSCMD_NOP;
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next_cycle <= `BUSCMD_NOP;
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decstate <= `DEC_ALU_INIT;
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decstate <= `DEC_ALU_INIT;
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alu_return <= `DEC_START;
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alu_return <= `DEC_START;
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`ifdef SIM
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`endif
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end
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end
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@ -22,28 +22,41 @@
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`ALU_REG_B: B[alu_first*4+:4] <= 0;
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`ALU_REG_B: B[alu_first*4+:4] <= 0;
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`ALU_REG_C: C[alu_first*4+:4] <= 0;
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`ALU_REG_C: C[alu_first*4+:4] <= 0;
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`ALU_REG_D: D[alu_first*4+:4] <= 0;
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`ALU_REG_D: D[alu_first*4+:4] <= 0;
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default: $display("ALU_OP_ZERO register not handled");
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default: begin
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$display("ALU_OP_ZERO register not handled");
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alu_requested_halt <= 1;
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end
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endcase
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endcase
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alu_first <= (alu_first + 1) & 4'hF;
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alu_first <= (alu_first + 1) & 4'hF;
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end
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end
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`ALU_OP_2CMPL: begin
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`ALU_OP_2CMPL: begin
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case (alu_reg_dest)
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case (alu_reg_dest)
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`ALU_REG_A: {Carry, A[alu_first*4+:4]} <= !alu_src1 + alu_carry;
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`ALU_REG_A: {Carry, A[alu_first*4+:4]} <= !alu_src1 + alu_carry;
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default: $display("ALU_OP_2CMPL register not handled");
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default: begin
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$display("ALU_OP_2CMPL register not handled");
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alu_requested_halt <= 1;
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end
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endcase
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endcase
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alu_first <= (alu_first + 1) & 4'hF;
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alu_first <= (alu_first + 1) & 4'hF;
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end
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end
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`ALU_OP_1CMPL: begin
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`ALU_OP_1CMPL: begin
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case (alu_reg_dest)
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case (alu_reg_dest)
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`ALU_REG_A: A[alu_first*4+:4] <= ~alu_src1;
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`ALU_REG_A: A[alu_first*4+:4] <= ~alu_src1;
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default: $display("ALU_OP_1CMPL register not handled");
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`ALU_REG_C: C[alu_first*4+:4] <= ~alu_src1;
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default: begin
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$display("ALU_OP_1CMPL register not handled");
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alu_requested_halt <= 1;
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end
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endcase
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endcase
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alu_first <= (alu_first + 1) & 4'hF;
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alu_first <= (alu_first + 1) & 4'hF;
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end
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end
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`ALU_OP_INC: begin
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`ALU_OP_INC: begin
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case (alu_reg_dest)
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case (alu_reg_dest)
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`ALU_REG_D: {Carry, D[alu_first*4+:4]} <= alu_src1 + alu_carry;
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`ALU_REG_D: {Carry, D[alu_first*4+:4]} <= alu_src1 + alu_carry;
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default: $display("ALU_OP_INC register not handled");
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default: begin
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$display("ALU_OP_INC register not handled");
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alu_requested_halt <= 1;
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end
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endcase
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endcase
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alu_first <= (alu_first + 1) & 4'hF;
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alu_first <= (alu_first + 1) & 4'hF;
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end
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end
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