mirror of
https://github.com/sxpert/hp-saturn
synced 2024-12-26 09:58:09 +01:00
handle 0
This commit is contained in:
parent
36fb15a209
commit
355539aaaf
2 changed files with 47 additions and 902 deletions
863
rom_tb
863
rom_tb
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@ -1,863 +0,0 @@
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#! /usr/bin/vvp -v
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:ivl_version "10.1 (stable)";
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:ivl_delay_selection "TYPICAL";
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:vpi_time_precision + 0;
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:vpi_module "system";
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:vpi_module "vhdl_sys";
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:vpi_module "v2005_math";
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:vpi_module "va_math";
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S_0x55eb737b02d0 .scope module, "saturn_tb" "saturn_tb" 2 846;
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.timescale 0 0;
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v0x55eb737d2ef0_0 .var "clk", 0 0;
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v0x55eb737d2fb0_0 .net "decstate", 31 0, v0x55eb737d2110_0; 1 drivers
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v0x55eb737d3070_0 .net "halt", 0 0, v0x55eb737d21d0_0; 1 drivers
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v0x55eb737d3170_0 .var "reset", 0 0;
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v0x55eb737d3240_0 .net "runstate", 3 0, v0x55eb737d2c60_0; 1 drivers
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E_0x55eb73731d20 .event posedge, v0x55eb737d21d0_0;
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S_0x55eb737b0450 .scope module, "saturn" "saturn_core" 2 853, 2 40 0, S_0x55eb737b02d0;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk"
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.port_info 1 /INPUT 1 "reset"
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.port_info 2 /OUTPUT 1 "halt"
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.port_info 3 /OUTPUT 4 "runstate"
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.port_info 4 /OUTPUT 32 "decstate"
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P_0x55eb737b05d0 .param/l "DEC" 1 2 101, +C4<00000000000000000000000000000001>;
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P_0x55eb737b0610 .param/l "DECODE_0" 1 2 64, C4<00000000000000000000000000000001>;
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P_0x55eb737b0650 .param/l "DECODE_0X" 1 2 65, C4<00000000000000000000000000000010>;
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P_0x55eb737b0690 .param/l "DECODE_1" 1 2 67, C4<00000000000000000000000000010000>;
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P_0x55eb737b06d0 .param/l "DECODE_14" 1 2 69, C4<00000000000000000000010000010000>;
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P_0x55eb737b0710 .param/l "DECODE_15" 1 2 70, C4<00000000000000000000010100010000>;
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P_0x55eb737b0750 .param/l "DECODE_1X" 1 2 68, C4<00000000000000000000000000010001>;
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P_0x55eb737b0790 .param/l "DECODE_8" 1 2 81, C4<00000000000000000000000010000000>;
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P_0x55eb737b07d0 .param/l "DECODE_80" 1 2 83, C4<00000000000000000000000010000010>;
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P_0x55eb737b0810 .param/l "DECODE_82" 1 2 89, C4<00000000000000000000001010000000>;
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P_0x55eb737b0850 .param/l "DECODE_8X" 1 2 82, C4<00000000000000000000000010000001>;
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P_0x55eb737b0890 .param/l "DECODE_A" 1 2 97, C4<00000000000000000000000010100000>;
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P_0x55eb737b08d0 .param/l "DECODE_A_FS" 1 2 98, C4<00000000000000000000000010100001>;
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P_0x55eb737b0910 .param/l "DECODE_C_EQ_P_N" 1 2 87, C4<00000000000000001100000010000000>;
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P_0x55eb737b0950 .param/l "DECODE_D0_EQ_5N" 1 2 72, C4<00000000000000000000101100010000>;
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P_0x55eb737b0990 .param/l "DECODE_GOSBVL" 1 2 95, C4<00000000000000000000111110000000>;
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P_0x55eb737b09d0 .param/l "DECODE_GOTO" 1 2 79, C4<00000000000000000000000001100000>;
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P_0x55eb737b0a10 .param/l "DECODE_GOVLNG" 1 2 94, C4<00000000000000000000110110000000>;
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P_0x55eb737b0a50 .param/l "DECODE_LC" 1 2 77, C4<00000000000000000000000000110001>;
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P_0x55eb737b0a90 .param/l "DECODE_LC_LEN" 1 2 76, C4<00000000000000000000000000110000>;
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P_0x55eb737b0ad0 .param/l "DECODE_MEMACCESS" 1 2 71, C4<00000000000000000000010000010001>;
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P_0x55eb737b0b10 .param/l "DECODE_P_EQ" 1 2 74, C4<00000000000000000000000000100000>;
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P_0x55eb737b0b50 .param/l "DECODE_RESET" 1 2 85, C4<00000000000000001010000010000000>;
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P_0x55eb737b0b90 .param/l "DECODE_START" 1 2 62, C4<00000000000000000000000000000000>;
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P_0x55eb737b0bd0 .param/l "DECODE_ST_EQ_0_N" 1 2 91, C4<00000000000000000000010010000000>;
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P_0x55eb737b0c10 .param/l "DECODE_ST_EQ_1_N" 1 2 92, C4<00000000000000000000010110000000>;
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P_0x55eb737b0c50 .param/l "HEX" 1 2 100, +C4<00000000000000000000000000000000>;
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P_0x55eb737b0c90 .param/l "READ_ROM_CLK" 1 2 54, +C4<00000000000000000000000000000010>;
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P_0x55eb737b0cd0 .param/l "READ_ROM_STA" 1 2 53, +C4<00000000000000000000000000000001>;
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P_0x55eb737b0d10 .param/l "READ_ROM_STR" 1 2 55, +C4<00000000000000000000000000000011>;
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P_0x55eb737b0d50 .param/l "READ_ROM_VAL" 1 2 56, +C4<00000000000000000000000000000100>;
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P_0x55eb737b0d90 .param/l "RUN_DECODE" 1 2 58, +C4<00000000000000000000000000001111>;
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P_0x55eb737b0dd0 .param/l "RUN_EXEC" 1 2 57, +C4<00000000000000000000000000001110>;
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P_0x55eb737b0e10 .param/l "RUN_START" 1 2 52, +C4<00000000000000000000000000000000>;
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v0x55eb737d1150_0 .var "A", 63 0;
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v0x55eb737d1250_0 .var "B", 63 0;
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v0x55eb737d1330_0 .var "C", 63 0;
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v0x55eb737d1420_0 .var "Carry", 0 0;
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v0x55eb737d14e0_0 .var "D", 63 0;
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v0x55eb737d1610_0 .var "D0", 19 0;
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v0x55eb737d16f0_0 .var "D1", 19 0;
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v0x55eb737d17d0_0 .var "HST", 3 0;
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v0x55eb737d18b0_0 .var "P", 3 0;
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v0x55eb737d1990_0 .var "PC", 19 0;
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v0x55eb737d1a70_0 .var "R0", 63 0;
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v0x55eb737d1b50_0 .var "R1", 63 0;
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v0x55eb737d1c30_0 .var "R2", 63 0;
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v0x55eb737d1d10_0 .var "R3", 63 0;
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v0x55eb737d1df0_0 .var "R4", 63 0;
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v0x55eb737d1ed0 .array "RSTK", 7 0, 19 0;
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v0x55eb737d1f90_0 .var "ST", 15 0;
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v0x55eb737d2070_0 .net "clk", 0 0, v0x55eb737d2ef0_0; 1 drivers
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v0x55eb737d2110_0 .var "decstate", 31 0;
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v0x55eb737d21d0_0 .var "halt", 0 0;
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v0x55eb737d2290_0 .var "hex_dec", 0 0;
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v0x55eb737d2350_0 .var "jump_base", 19 0;
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v0x55eb737d2430_0 .var "jump_offset", 19 0;
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v0x55eb737d2510_0 .var "load_cnt", 3 0;
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v0x55eb737d25f0_0 .var "load_ctr", 3 0;
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v0x55eb737d26d0_0 .var "nibble", 3 0;
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v0x55eb737d27b0_0 .net "reset", 0 0, v0x55eb737d3170_0; 1 drivers
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v0x55eb737d2870_0 .var "rom_address", 19 0;
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v0x55eb737d2960_0 .var "rom_clock", 0 0;
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v0x55eb737d2a00_0 .var "rom_enable", 0 0;
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v0x55eb737d2ad0_0 .net "rom_nibble", 3 0, v0x55eb737d0ee0_0; 1 drivers
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v0x55eb737d2ba0_0 .var "rstk_ptr", 2 0;
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v0x55eb737d2c60_0 .var "runstate", 3 0;
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v0x55eb737d2d40_0 .var "saved_PC", 19 0;
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S_0x55eb737b10c0 .scope module, "calc_rom" "hp_rom" 2 146, 2 9 0, S_0x55eb737b0450;
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.timescale 0 0;
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.port_info 0 /INPUT 1 "clk"
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.port_info 1 /INPUT 20 "address"
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.port_info 2 /INPUT 1 "enable"
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.port_info 3 /OUTPUT 4 "nibble_out"
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P_0x55eb737b1290 .param/str "ROM_FILENAME" 1 2 15, "rom-gx-r.hex";
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v0x55eb737af640_0 .net "address", 19 0, v0x55eb737d2870_0; 1 drivers
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v0x55eb737ae630_0 .net "clk", 0 0, v0x55eb737d2ef0_0; alias, 1 drivers
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v0x55eb737d0e10_0 .net "enable", 0 0, v0x55eb737d2a00_0; 1 drivers
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v0x55eb737d0ee0_0 .var "nibble_out", 3 0;
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v0x55eb737d0fc0 .array "rom", 1048575 0, 3 0;
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E_0x55eb73766ba0 .event posedge, v0x55eb737ae630_0;
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.scope S_0x55eb737b10c0;
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T_0 ;
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%vpi_call 2 24 "$readmemh", P_0x55eb737b1290, v0x55eb737d0fc0 {0 0 0};
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%end;
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.thread T_0;
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.scope S_0x55eb737b10c0;
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T_1 ;
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%wait E_0x55eb73766ba0;
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%load/vec4 v0x55eb737d0e10_0;
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%flag_set/vec4 8;
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%jmp/0xz T_1.0, 8;
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%load/vec4 v0x55eb737af640_0;
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%pad/u 22;
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%ix/vec4 4;
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%load/vec4a v0x55eb737d0fc0, 4;
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%assign/vec4 v0x55eb737d0ee0_0, 0;
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T_1.0 ;
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%jmp T_1;
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.thread T_1;
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.scope S_0x55eb737b0450;
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T_2 ;
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%wait E_0x55eb73766ba0;
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%load/vec4 v0x55eb737d27b0_0;
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%flag_set/vec4 8;
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%jmp/0xz T_2.0, 8;
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%pushi/vec4 0, 0, 1;
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%assign/vec4 v0x55eb737d2290_0, 0;
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%pushi/vec4 7, 0, 3;
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%assign/vec4 v0x55eb737d2ba0_0, 0;
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%pushi/vec4 0, 0, 20;
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%assign/vec4 v0x55eb737d1990_0, 0;
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%pushi/vec4 0, 0, 4;
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%assign/vec4 v0x55eb737d18b0_0, 0;
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%pushi/vec4 0, 0, 16;
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%assign/vec4 v0x55eb737d1f90_0, 0;
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%pushi/vec4 0, 0, 4;
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%assign/vec4 v0x55eb737d17d0_0, 0;
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%pushi/vec4 0, 0, 1;
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%assign/vec4 v0x55eb737d1420_0, 0;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 0, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 1, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 2, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 3, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 4, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 5, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 6, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%ix/load 3, 7, 0;
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%flag_set/imm 4, 0;
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%ix/load 4, 0, 0; Constant delay
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%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
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%pushi/vec4 0, 0, 20;
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%assign/vec4 v0x55eb737d1610_0, 0;
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%pushi/vec4 0, 0, 20;
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%assign/vec4 v0x55eb737d16f0_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1150_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1250_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1330_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d14e0_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1a70_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1b50_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1c30_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1d10_0, 0;
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%pushi/vec4 0, 0, 64;
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%assign/vec4 v0x55eb737d1df0_0, 0;
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%pushi/vec4 0, 0, 1;
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%assign/vec4 v0x55eb737d21d0_0, 0;
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%pushi/vec4 0, 0, 4;
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%assign/vec4 v0x55eb737d2c60_0, 0;
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%pushi/vec4 0, 0, 32;
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%assign/vec4 v0x55eb737d2110_0, 0;
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%jmp T_2.1;
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T_2.0 ;
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%load/vec4 v0x55eb737d2c60_0;
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%pad/u 32;
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%cmpi/e 0, 0, 32;
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%jmp/0xz T_2.2, 4;
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%pushi/vec4 1, 0, 4;
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%assign/vec4 v0x55eb737d2c60_0, 0;
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T_2.2 ;
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T_2.1 ;
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%load/vec4 v0x55eb737d2c60_0;
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%pad/u 32;
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%pushi/vec4 0, 0, 32;
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%cmp/e;
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%flag_get/vec4 4;
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%load/vec4 v0x55eb737d27b0_0;
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%inv;
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%and;
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%flag_set/vec4 8;
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%jmp/0xz T_2.4, 8;
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%load/vec4 v0x55eb737d1990_0;
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%assign/vec4 v0x55eb737d2d40_0, 0;
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%load/vec4 v0x55eb737d2290_0;
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%flag_set/vec4 8;
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%jmp/0 T_2.6, 8;
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%pushi/vec4 4474179, 0, 24; draw_string_vec4
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%jmp/1 T_2.7, 8;
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T_2.6 ; End of true expr.
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%pushi/vec4 4736344, 0, 24; draw_string_vec4
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%jmp/0 T_2.7, 8;
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; End of false expr.
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%blend;
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T_2.7;
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%vpi_call 2 209 "$display", "PC: %05h Carry: %b h: %s rp: %h RSTK7: %05h", v0x55eb737d1990_0, v0x55eb737d1420_0, S<0,vec4,u24>, v0x55eb737d2ba0_0, &A<v0x55eb737d1ed0, 7> {1 0 0};
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%vpi_call 2 210 "$display", "P: %h HST: %b ST: %b RSTK6: %5h", v0x55eb737d18b0_0, v0x55eb737d17d0_0, v0x55eb737d1f90_0, &A<v0x55eb737d1ed0, 6> {0 0 0};
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%vpi_call 2 211 "$display", "A: %h R0: %h RSTK5: %5h", v0x55eb737d1150_0, v0x55eb737d1a70_0, &A<v0x55eb737d1ed0, 5> {0 0 0};
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%vpi_call 2 212 "$display", "B: %h R1: %h RSTK4: %5h", v0x55eb737d1250_0, v0x55eb737d1b50_0, &A<v0x55eb737d1ed0, 4> {0 0 0};
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%vpi_call 2 213 "$display", "C: %h R2: %h RSTK3: %5h", v0x55eb737d1330_0, v0x55eb737d1c30_0, &A<v0x55eb737d1ed0, 3> {0 0 0};
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%vpi_call 2 214 "$display", "D: %h R3: %h RSTK2: %5h", v0x55eb737d14e0_0, v0x55eb737d1d10_0, &A<v0x55eb737d1ed0, 2> {0 0 0};
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%vpi_call 2 215 "$display", "D0: %h D1: %h R4: %h RSTK1: %5h", v0x55eb737d1610_0, v0x55eb737d16f0_0, v0x55eb737d1df0_0, &A<v0x55eb737d1ed0, 1> {0 0 0};
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%vpi_call 2 216 "$display", " RSTK0: %5h", &A<v0x55eb737d1ed0, 0> {0 0 0};
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T_2.4 ;
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%load/vec4 v0x55eb737d2c60_0;
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%pad/u 32;
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%cmpi/e 1, 0, 32;
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%jmp/0xz T_2.8, 4;
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%pushi/vec4 1, 0, 1;
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%assign/vec4 v0x55eb737d2a00_0, 0;
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%load/vec4 v0x55eb737d1990_0;
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%assign/vec4 v0x55eb737d2870_0, 0;
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%pushi/vec4 2, 0, 4;
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%assign/vec4 v0x55eb737d2c60_0, 0;
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T_2.8 ;
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%load/vec4 v0x55eb737d2c60_0;
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%pad/u 32;
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%cmpi/e 2, 0, 32;
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%jmp/0xz T_2.10, 4;
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%pushi/vec4 1, 0, 1;
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%assign/vec4 v0x55eb737d2960_0, 0;
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%pushi/vec4 3, 0, 4;
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%assign/vec4 v0x55eb737d2c60_0, 0;
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T_2.10 ;
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%load/vec4 v0x55eb737d2c60_0;
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%pad/u 32;
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%cmpi/e 3, 0, 32;
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%jmp/0xz T_2.12, 4;
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%load/vec4 v0x55eb737d2ad0_0;
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%assign/vec4 v0x55eb737d26d0_0, 0;
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%load/vec4 v0x55eb737d1990_0;
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%addi 1, 0, 20;
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%assign/vec4 v0x55eb737d1990_0, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v0x55eb737d2a00_0, 0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v0x55eb737d2960_0, 0;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
T_2.12 ;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%pad/u 32;
|
||||
%pushi/vec4 4, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%and;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_2.14, 8;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%load/vec4 v0x55eb737d26d0_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.16, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 6, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.17, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 8, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.18, 6;
|
||||
%vpi_call 2 283 "$display", "%05h nibble %h => unimplemented", v0x55eb737d2d40_0, v0x55eb737d26d0_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.20;
|
||||
T_2.16 ;
|
||||
%pushi/vec4 32, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.20;
|
||||
T_2.17 ;
|
||||
%pushi/vec4 96, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.20;
|
||||
T_2.18 ;
|
||||
%pushi/vec4 128, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.20;
|
||||
T_2.20 ;
|
||||
%pop/vec4 1;
|
||||
T_2.14 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%cmpi/e 32, 0, 32;
|
||||
%jmp/0xz T_2.21, 4;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.23, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.24, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.25, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.26, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.27, 6;
|
||||
%vpi_call 2 432 "$display", "runstate %h", v0x55eb737d2c60_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.29;
|
||||
T_2.23 ;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.29;
|
||||
T_2.24 ;
|
||||
%jmp T_2.29;
|
||||
T_2.25 ;
|
||||
%jmp T_2.29;
|
||||
T_2.26 ;
|
||||
%jmp T_2.29;
|
||||
T_2.27 ;
|
||||
%load/vec4 v0x55eb737d26d0_0;
|
||||
%assign/vec4 v0x55eb737d18b0_0, 0;
|
||||
%vpi_call 2 424 "$display", "%05h P=\011%h", v0x55eb737d2d40_0, v0x55eb737d26d0_0 {0 0 0};
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.29;
|
||||
T_2.29 ;
|
||||
%pop/vec4 1;
|
||||
T_2.21 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%cmpi/e 96, 0, 32;
|
||||
%jmp/0xz T_2.30, 4;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.32, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.33, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.34, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.35, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.36, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 14, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.37, 6;
|
||||
%vpi_call 2 524 "$display", "runstate %h", v0x55eb737d2c60_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.39;
|
||||
T_2.32 ;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%load/vec4 v0x55eb737d1990_0;
|
||||
%assign/vec4 v0x55eb737d2350_0, 0;
|
||||
%pushi/vec4 0, 0, 20;
|
||||
%assign/vec4 v0x55eb737d2430_0, 0;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2510_0, 0;
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%assign/vec4 v0x55eb737d25f0_0, 0;
|
||||
%vpi_call 2 496 "$write", "%5h GOTO\011", v0x55eb737d2d40_0 {0 0 0};
|
||||
%jmp T_2.39;
|
||||
T_2.33 ;
|
||||
%jmp T_2.39;
|
||||
T_2.34 ;
|
||||
%jmp T_2.39;
|
||||
T_2.35 ;
|
||||
%jmp T_2.39;
|
||||
T_2.36 ;
|
||||
%load/vec4 v0x55eb737d26d0_0;
|
||||
%ix/load 5, 0, 0;
|
||||
%load/vec4 v0x55eb737d25f0_0;
|
||||
%pad/u 32;
|
||||
%muli 4, 0, 32;
|
||||
%ix/vec4 4;
|
||||
%assign/vec4/off/d v0x55eb737d2430_0, 4, 5;
|
||||
%vpi_call 2 504 "$write", "%1h", v0x55eb737d26d0_0 {0 0 0};
|
||||
%load/vec4 v0x55eb737d25f0_0;
|
||||
%load/vec4 v0x55eb737d2510_0;
|
||||
%cmp/e;
|
||||
%jmp/0xz T_2.40, 4;
|
||||
%pushi/vec4 14, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.41;
|
||||
T_2.40 ;
|
||||
%load/vec4 v0x55eb737d25f0_0;
|
||||
%addi 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d25f0_0, 0;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
T_2.41 ;
|
||||
%jmp T_2.39;
|
||||
T_2.37 ;
|
||||
%load/vec4 v0x55eb737d2350_0;
|
||||
%load/vec4 v0x55eb737d2430_0;
|
||||
%add;
|
||||
%vpi_call 2 516 "$display", "\011=> %05h", S<0,vec4,u20> {1 0 0};
|
||||
%load/vec4 v0x55eb737d2350_0;
|
||||
%load/vec4 v0x55eb737d2430_0;
|
||||
%add;
|
||||
%assign/vec4 v0x55eb737d1990_0, 0;
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.39;
|
||||
T_2.39 ;
|
||||
%pop/vec4 1;
|
||||
T_2.30 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%cmpi/e 128, 0, 32;
|
||||
%jmp/0xz T_2.42, 4;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.44, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.45, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.46, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.47, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.48, 6;
|
||||
%vpi_call 2 563 "$display", "runstate %h", v0x55eb737d2c60_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.50;
|
||||
T_2.44 ;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.50;
|
||||
T_2.45 ;
|
||||
%jmp T_2.50;
|
||||
T_2.46 ;
|
||||
%jmp T_2.50;
|
||||
T_2.47 ;
|
||||
%jmp T_2.50;
|
||||
T_2.48 ;
|
||||
%load/vec4 v0x55eb737d26d0_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.51, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.52, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 5, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.53, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 13, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.54, 6;
|
||||
%vpi_call 2 553 "$display", "unhandled instruction prefix 8%h", v0x55eb737d26d0_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.56;
|
||||
T_2.51 ;
|
||||
%pushi/vec4 130, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.56;
|
||||
T_2.52 ;
|
||||
%pushi/vec4 1152, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.56;
|
||||
T_2.53 ;
|
||||
%pushi/vec4 1408, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.56;
|
||||
T_2.54 ;
|
||||
%pushi/vec4 3456, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.56;
|
||||
T_2.56 ;
|
||||
%pop/vec4 1;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.50;
|
||||
T_2.50 ;
|
||||
%pop/vec4 1;
|
||||
T_2.42 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%cmpi/e 130, 0, 32;
|
||||
%jmp/0xz T_2.57, 4;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.59, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.60, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.61, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.62, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.63, 6;
|
||||
%vpi_call 2 599 "$display", "DECODE_80 runstate %h", v0x55eb737d2c60_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.65;
|
||||
T_2.59 ;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.65;
|
||||
T_2.60 ;
|
||||
%jmp T_2.65;
|
||||
T_2.61 ;
|
||||
%jmp T_2.65;
|
||||
T_2.62 ;
|
||||
%jmp T_2.65;
|
||||
T_2.63 ;
|
||||
%load/vec4 v0x55eb737d26d0_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 12, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.66, 6;
|
||||
%vpi_call 2 589 "$display", "unhandled instruction prefix 80%h", v0x55eb737d26d0_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.68;
|
||||
T_2.66 ;
|
||||
%pushi/vec4 49280, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.68;
|
||||
T_2.68 ;
|
||||
%pop/vec4 1;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.65;
|
||||
T_2.65 ;
|
||||
%pop/vec4 1;
|
||||
T_2.57 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%pushi/vec4 1152, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%pushi/vec4 1408, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%or;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_2.69, 8;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.71, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.72, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.73, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.74, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.75, 6;
|
||||
%vpi_call 2 712 "$display", "decstate %h", v0x55eb737d2110_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.77;
|
||||
T_2.71 ;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.77;
|
||||
T_2.72 ;
|
||||
%jmp T_2.77;
|
||||
T_2.73 ;
|
||||
%jmp T_2.77;
|
||||
T_2.74 ;
|
||||
%jmp T_2.77;
|
||||
T_2.75 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1152, 0, 32;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.78, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1408, 0, 32;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.79, 6;
|
||||
%jmp T_2.80;
|
||||
T_2.78 ;
|
||||
%vpi_call 2 694 "$display", "%05h ST=0\011%h", v0x55eb737d2d40_0, v0x55eb737d26d0_0 {0 0 0};
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%ix/load 5, 0, 0;
|
||||
%ix/getv 4, v0x55eb737d26d0_0;
|
||||
%assign/vec4/off/d v0x55eb737d1f90_0, 4, 5;
|
||||
%jmp T_2.80;
|
||||
T_2.79 ;
|
||||
%vpi_call 2 701 "$display", "%05h ST=1\011%h", v0x55eb737d2d40_0, v0x55eb737d26d0_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%ix/load 5, 0, 0;
|
||||
%ix/getv 4, v0x55eb737d26d0_0;
|
||||
%assign/vec4/off/d v0x55eb737d1f90_0, 4, 5;
|
||||
%jmp T_2.80;
|
||||
T_2.80 ;
|
||||
%pop/vec4 1;
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.77;
|
||||
T_2.77 ;
|
||||
%pop/vec4 1;
|
||||
T_2.69 ;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%pushi/vec4 3456, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%pushi/vec4 3968, 0, 32;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 4;
|
||||
%or;
|
||||
%flag_set/vec4 8;
|
||||
%jmp/0xz T_2.81, 8;
|
||||
%load/vec4 v0x55eb737d2c60_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 15, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.83, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.84, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 2, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.85, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.86, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.87, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 14, 0, 4;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.88, 6;
|
||||
%vpi_call 2 771 "$display", "decstate %h", v0x55eb737d2110_0 {0 0 0};
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d21d0_0, 0;
|
||||
%jmp T_2.90;
|
||||
T_2.83 ;
|
||||
%pushi/vec4 0, 0, 20;
|
||||
%assign/vec4 v0x55eb737d2350_0, 0;
|
||||
%pushi/vec4 4, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2510_0, 0;
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%assign/vec4 v0x55eb737d25f0_0, 0;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3456, 0, 32;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.91, 6;
|
||||
%dup/vec4;
|
||||
%pushi/vec4 3968, 0, 32;
|
||||
%cmp/u;
|
||||
%jmp/1 T_2.92, 6;
|
||||
%jmp T_2.93;
|
||||
T_2.91 ;
|
||||
%vpi_call 2 734 "$write", "%5h GOVLNG\011", v0x55eb737d2d40_0 {0 0 0};
|
||||
%jmp T_2.93;
|
||||
T_2.92 ;
|
||||
%vpi_call 2 735 "$write", "%5h GOSBVL\011", v0x55eb737d2d40_0 {0 0 0};
|
||||
%jmp T_2.93;
|
||||
T_2.93 ;
|
||||
%pop/vec4 1;
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%cmpi/e 3968, 0, 32;
|
||||
%jmp/0xz T_2.94, 4;
|
||||
%load/vec4 v0x55eb737d2ba0_0;
|
||||
%addi 1, 0, 3;
|
||||
%assign/vec4 v0x55eb737d2ba0_0, 0;
|
||||
T_2.94 ;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.90;
|
||||
T_2.84 ;
|
||||
%jmp T_2.90;
|
||||
T_2.85 ;
|
||||
%jmp T_2.90;
|
||||
T_2.86 ;
|
||||
%jmp T_2.90;
|
||||
T_2.87 ;
|
||||
%load/vec4 v0x55eb737d26d0_0;
|
||||
%load/vec4 v0x55eb737d25f0_0;
|
||||
%pad/u 32;
|
||||
%muli 4, 0, 32;
|
||||
%ix/vec4 4;
|
||||
%store/vec4 v0x55eb737d2350_0, 4, 4;
|
||||
%vpi_call 2 748 "$write", "%1h", v0x55eb737d26d0_0 {0 0 0};
|
||||
%load/vec4 v0x55eb737d25f0_0;
|
||||
%load/vec4 v0x55eb737d2510_0;
|
||||
%cmp/e;
|
||||
%jmp/0xz T_2.96, 4;
|
||||
%pushi/vec4 14, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%jmp T_2.97;
|
||||
T_2.96 ;
|
||||
%load/vec4 v0x55eb737d25f0_0;
|
||||
%addi 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d25f0_0, 0;
|
||||
%pushi/vec4 1, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
T_2.97 ;
|
||||
%jmp T_2.90;
|
||||
T_2.88 ;
|
||||
%vpi_call 2 760 "$display", "\011=> %5h", v0x55eb737d2350_0 {0 0 0};
|
||||
%load/vec4 v0x55eb737d2110_0;
|
||||
%cmpi/e 3968, 0, 32;
|
||||
%jmp/0xz T_2.98, 4;
|
||||
%load/vec4 v0x55eb737d1990_0;
|
||||
%load/vec4 v0x55eb737d2ba0_0;
|
||||
%pad/u 5;
|
||||
%ix/vec4 3;
|
||||
%ix/load 4, 0, 0; Constant delay
|
||||
%assign/vec4/a/d v0x55eb737d1ed0, 0, 4;
|
||||
T_2.98 ;
|
||||
%load/vec4 v0x55eb737d2350_0;
|
||||
%assign/vec4 v0x55eb737d1990_0, 0;
|
||||
%pushi/vec4 0, 0, 4;
|
||||
%assign/vec4 v0x55eb737d2c60_0, 0;
|
||||
%pushi/vec4 0, 0, 32;
|
||||
%assign/vec4 v0x55eb737d2110_0, 0;
|
||||
%jmp T_2.90;
|
||||
T_2.90 ;
|
||||
%pop/vec4 1;
|
||||
T_2.81 ;
|
||||
%jmp T_2;
|
||||
.thread T_2;
|
||||
.scope S_0x55eb737b02d0;
|
||||
T_3 ;
|
||||
%delay 10, 0;
|
||||
%load/vec4 v0x55eb737d2ef0_0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%cmp/e;
|
||||
%flag_get/vec4 6;
|
||||
%store/vec4 v0x55eb737d2ef0_0, 0, 1;
|
||||
%jmp T_3;
|
||||
.thread T_3;
|
||||
.scope S_0x55eb737b02d0;
|
||||
T_4 ;
|
||||
%end;
|
||||
.thread T_4;
|
||||
.scope S_0x55eb737b02d0;
|
||||
T_5 ;
|
||||
%vpi_call 2 869 "$display", "starting the simulation" {0 0 0};
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v0x55eb737d2ef0_0, 0;
|
||||
%pushi/vec4 1, 0, 1;
|
||||
%assign/vec4 v0x55eb737d3170_0, 0;
|
||||
%wait E_0x55eb73766ba0;
|
||||
%pushi/vec4 0, 0, 1;
|
||||
%assign/vec4 v0x55eb737d3170_0, 0;
|
||||
%wait E_0x55eb73731d20;
|
||||
%vpi_call 2 875 "$finish" {0 0 0};
|
||||
%end;
|
||||
.thread T_5;
|
||||
# The file index is used to find the file name in the following table.
|
||||
:file_names 3;
|
||||
"N/A";
|
||||
"<interactive>";
|
||||
"saturn_core.v";
|
|
@ -47,7 +47,7 @@ module saturn_core (
|
|||
`else
|
||||
module saturn_core (
|
||||
input clk_25mhz,
|
||||
input [6:0] btn,
|
||||
input [6:0] btn,
|
||||
output wifi_gpio0
|
||||
);
|
||||
wire clk;
|
||||
|
@ -280,7 +280,7 @@ begin
|
|||
//$display("READ_ROM_VAL -> instruction decoder");
|
||||
runstate <= RUN_DECODE;
|
||||
case (nibble)
|
||||
//4'h0 : decstate <= DECODE_0;
|
||||
4'h0 : decstate <= DECODE_0;
|
||||
//4'h1 : decstate <= DECODE_1;
|
||||
4'h2 : decstate <= DECODE_P_EQ;
|
||||
//4'h3 : decstate <= DECODE_LC;
|
||||
|
@ -297,27 +297,34 @@ begin
|
|||
end
|
||||
endcase
|
||||
end
|
||||
/*
|
||||
task decode_0;
|
||||
case (decstate )
|
||||
DECODE_START:
|
||||
begin
|
||||
decstate <= DECODE_0X;
|
||||
read_state <= READ_START;
|
||||
end
|
||||
DECODE_0X:
|
||||
if (read_state != READ_VALID) read_rom();
|
||||
else decode_0x();
|
||||
endcase
|
||||
endtask
|
||||
|
||||
task decode_0x;
|
||||
case (nibble)
|
||||
4'h3: inst_rtncc();
|
||||
4'h4: inst_sethex();
|
||||
default: instruction_decoder_unhandled();
|
||||
endcase
|
||||
endtask
|
||||
if (decstate == DECODE_0)
|
||||
case (runstate)
|
||||
RUN_DECODE: runstate <= READ_ROM_STA;
|
||||
READ_ROM_STA, READ_ROM_CLK, READ_ROM_STR: ;
|
||||
READ_ROM_VAL:
|
||||
case (nibble)
|
||||
//4'h3: inst_rtncc();
|
||||
//4'h4: inst_sethex();
|
||||
default:
|
||||
begin
|
||||
`ifdef SIM
|
||||
$display("%05h 0%h => unimplemented", saved_PC, nibble);
|
||||
`endif
|
||||
halt <= 1;
|
||||
end
|
||||
endcase
|
||||
default:
|
||||
begin
|
||||
`ifdef SIM
|
||||
$display("DECODE_0 runstate %h", runstate);
|
||||
`endif
|
||||
halt <= 1;
|
||||
end
|
||||
endcase
|
||||
|
||||
|
||||
/*
|
||||
|
||||
// 03 RTNCC
|
||||
task inst_rtncc;
|
||||
|
@ -550,7 +557,7 @@ endtask
|
|||
begin
|
||||
case (nibble)
|
||||
4'h0: decstate <= DECODE_80;
|
||||
//4'h2: decode_82();
|
||||
4'h2: decstate <= DECODE_82;
|
||||
4'h4: decstate <= DECODE_ST_EQ_0_N;
|
||||
4'h5: decstate <= DECODE_ST_EQ_1_N;
|
||||
4'hd: decstate <= DECODE_GOVLNG;
|
||||
|
@ -669,20 +676,14 @@ endtask
|
|||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
|
||||
task decode_82;
|
||||
case (decstate )
|
||||
DECODE_8X:
|
||||
begin
|
||||
decstate <= DECODE_82;
|
||||
read_state <= READ_START;
|
||||
end
|
||||
DECODE_82:
|
||||
if (read_state != READ_VALID) read_rom();
|
||||
else
|
||||
if (decstate == DECODE_82)
|
||||
case (runstate)
|
||||
RUN_DECODE: runstate <= READ_ROM_STA;
|
||||
READ_ROM_STA, READ_ROM_CLK, READ_ROM_STR: ;
|
||||
READ_ROM_VAL:
|
||||
begin
|
||||
HST <= HST & ~nibble;
|
||||
`ifdef SIM
|
||||
case (nibble)
|
||||
4'h1: $display("%5h XM=0", saved_PC);
|
||||
4'h2: $display("%5h SB=0", saved_PC);
|
||||
|
@ -691,11 +692,18 @@ task decode_82;
|
|||
4'hf: $display("%5h CLRHST", saved_PC);
|
||||
default: $display("%5h CLRHST %f", saved_PC, nibble);
|
||||
endcase
|
||||
end_decode();
|
||||
`endif
|
||||
runstate <= RUN_START;
|
||||
decstate <= DECODE_START;
|
||||
end
|
||||
endcase
|
||||
endtask
|
||||
*/
|
||||
default:
|
||||
begin
|
||||
`ifdef SIM
|
||||
$display("DECODE_82 runstate %h", runstate);
|
||||
`endif
|
||||
halt <= 1;
|
||||
end
|
||||
endcase
|
||||
|
||||
/******************************************************************************
|
||||
* 84n ST=0 n
|
||||
|
|
Loading…
Reference in a new issue