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add block 13x

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This commit is contained in:
Raphael Jacquot 2019-03-18 06:54:39 +01:00
parent c48944623d
commit 30ae63dfdf
1 changed files with 27 additions and 0 deletions
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27
saturn_inst_decoder.v
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@ -136,6 +136,7 @@ reg [0:0] decode_started;
reg [0:0] block_0x; reg [0:0] block_0x;
reg [0:0] block_1x; reg [0:0] block_1x;
reg [0:0] block_13x;
reg [0:0] block_14x; reg [0:0] block_14x;
reg [0:0] block_15x; reg [0:0] block_15x;
reg [0:0] block_15xa; reg [0:0] block_15xa;
@ -195,6 +196,7 @@ initial begin
block_0x = 1'b0; block_0x = 1'b0;
block_1x = 1'b0; block_1x = 1'b0;
block_13x = 1'b0;
block_14x = 1'b0; block_14x = 1'b0;
block_15x = 1'b0; block_15x = 1'b0;
block_15xa = 1'b0; block_15xa = 1'b0;
@ -349,6 +351,7 @@ always @(posedge i_clk) begin
if (block_1x) begin if (block_1x) begin
case (i_nibble) case (i_nibble)
4'h3: block_13x <= 1'b1;
4'h4: block_14x <= 1'b1; 4'h4: block_14x <= 1'b1;
4'h5: block_15x <= 1'b1; 4'h5: block_15x <= 1'b1;
4'h9, 4'hA, 4'hB, 4'hD, 4'hE, 4'hF: 4'h9, 4'hA, 4'hB, 4'hD, 4'hE, 4'hF:
@ -371,6 +374,29 @@ always @(posedge i_clk) begin
block_1x <= 1'b0; block_1x <= 1'b0;
end end
if (block_13x) begin
$display("DECODER %0d: [%d] block_13x %h", i_phase, i_cycle_ctr, i_nibble);
o_instr_type <= `INSTR_TYPE_ALU;
if (!i_nibble[1]) begin
o_alu_opcode <= `ALU_OP_COPY;
o_alu_reg_dest <= i_nibble[0] ? `ALU_REG_D1 : `ALU_REG_D0;
o_alu_reg_src_1 <= i_nibble[2] ? `ALU_REG_C : `ALU_REG_A;
o_alu_reg_src_2 <= `ALU_REG_NONE;
end else begin
o_alu_opcode <= `ALU_OP_EXCH;
o_alu_reg_dest <= i_nibble[2] ? `ALU_REG_C : `ALU_REG_A;
o_alu_reg_src_1 <= i_nibble[0] ? `ALU_REG_D1 : `ALU_REG_D0;
o_alu_reg_src_2 <= i_nibble[2] ? `ALU_REG_C : `ALU_REG_A;
end
o_alu_ptr_begin <= 4'h0;
o_alu_ptr_end <= i_nibble[3] ? 4'h3 : 4'h4;
o_alu_opcode <= i_nibble[1] ? `ALU_OP_EXCH : `ALU_OP_COPY;
o_instr_execute <= 1'b1;
o_instr_decoded <= 1'b1;
decode_started <= 1'b0;
block_13x <= 1'b0;
end
if (block_14x) begin if (block_14x) begin
$display("DECODER %0d: [%d] block_14x %h", i_phase, i_cycle_ctr, i_nibble); $display("DECODER %0d: [%d] block_14x %h", i_phase, i_cycle_ctr, i_nibble);
o_mem_pointer <= i_nibble[0]; o_mem_pointer <= i_nibble[0];
@ -814,6 +840,7 @@ always @(posedge i_clk) begin
block_0x <= 1'b0; block_0x <= 1'b0;
block_1x <= 1'b0; block_1x <= 1'b0;
block_13x <= 1'b0;
block_14x <= 1'b0; block_14x <= 1'b0;
block_15x <= 1'b0; block_15x <= 1'b0;
block_15xa <= 1'b0; block_15xa <= 1'b0;