2019-02-15 11:04:01 +01:00
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if (do_block_8x) begin
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$display("block_8x %h | op %d", i_nibble, o_alu_op);
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case (i_nibble)
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4'h0: //
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block_80x <= 1;
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4'h2:
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block_82x <= 1;
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4'h4, 4'h5: // ST=[01] n
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begin
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o_alu_op <= i_nibble[0]?`ALU_OP_SET_BIT:`ALU_OP_RST_BIT;
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block_sr_bit <= 1;
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`ifdef SIM
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o_unimplemented <= 0;
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`endif
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end
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2019-02-16 11:08:34 +01:00
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4'hA: block_8Ax <= 1;
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2019-02-15 11:04:01 +01:00
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4'hC, 4'hD,
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4'hE, 4'hF: // GOLONG, GOVLNG, GOSUBL, GOSBVL
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begin
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o_alu_no_stall <= 1;
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o_alu_op <= i_nibble[0]?`ALU_OP_JMP_ABS5:`ALU_OP_JMP_REL4;
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// is it a gosub ?
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o_push <= i_nibble[1];
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o_alu_debug <= i_nibble[1];
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mem_load_max <= i_nibble[0]?4:3;
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o_mem_pos <= 0;
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block_jmp <= 1;
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// debug for cases not tested
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o_alu_debug <= !i_nibble[0];
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`ifdef SIM
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o_unimplemented <= 0;
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`endif
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end
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default: begin
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$display("block_8x %h error", i_nibble);
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o_dec_error <= 1;
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end
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endcase
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block_8x <= 0;
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end
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if (do_block_80x) begin
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$display("block_80x %h | op %d", i_nibble, o_alu_op);
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case (i_nibble)
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4'h5: begin // CONFIG
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next_nibble <= 0;
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o_ins_decoded <= 1;
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end
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4'hA: begin // RESET
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next_nibble <= 0;
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o_ins_decoded <= 1;
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end
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4'hC: block_80Cx <= 1;
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default: begin
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$display("block_80x %h error", i_nibble);
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o_dec_error <= 1;
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end
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endcase
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block_80x <= 0;
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end
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if (do_block_80Cx) begin
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o_ins_alu_op <= 1;
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o_alu_op <= `ALU_OP_COPY;
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next_nibble <= 0;
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o_ins_decoded <= 1;
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block_80Cx <= 0;
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end
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// 821 XM=0
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// 822 SB=0
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// 824 SR=0
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// 828 MP=0
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// 82F CLRHST
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// 82x CLRHST x
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if (do_block_82x) begin
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o_ins_alu_op <= 1;
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o_alu_op <= `ALU_OP_CLR_MASK;
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o_imm_value <= i_nibble;
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next_nibble <= 0;
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o_ins_decoded <= 1;
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`ifdef SIM
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o_unimplemented <= 0;
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`endif
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block_82x <= 0;
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end
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2019-02-16 07:35:06 +01:00
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if (do_block_8Ax) begin
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2019-02-16 11:08:34 +01:00
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o_fields_table <= `FT_TABLE_f;
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2019-02-16 07:35:06 +01:00
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o_ins_alu_op <= 1;
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o_alu_op <= i_nibble[2]?`ALU_OP_TEST_NEQ:`ALU_OP_TEST_EQ;
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2019-02-16 12:17:40 +01:00
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// o_alu_debug <= 1;
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2019-02-16 07:35:06 +01:00
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o_mem_pos <= 0;
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mem_load_max <= 1;
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o_ins_decoded <= 1;
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next_nibble <= 0;
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block_jump_test <= 1;
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2019-02-16 11:08:34 +01:00
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// lauch the ALU into test_go mode
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o_ins_test_go <= 1;
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2019-02-16 07:35:06 +01:00
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block_8Ax <= 0;
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end
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