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Author SHA1 Message Date
Matthew Berry
04a70527ec handle thumb stm w/ rb in list, pass gba-suite thumb 2020-11-17 23:15:12 -08:00
Matthew Berry
37ef5ab719 basic irq impl, loads HAL screen in Kirby, crashes on tonc's irq_demo 2020-11-17 00:23:28 -08:00
Matthew Berry
b5ba760993 add some gifs/pictures to the readme 2020-11-16 22:32:57 -08:00
Matthew Berry
3b7e0448c9 run through normatt's bios successfully, print unmapped mmio/ppu read/writes to stdout 
simply comment out the default PC value to run the bios. I've left it
disabled because that's not the source of my inaccuracy, and it's
annoying to look at every time :p
 2020-11-15 23:32:06 -08:00
Matthew Berry
5c6ec3e6f2 added read/write of waitcnt and a bunch of ppu regs 2020-11-14 09:47:08 -08:00
Matthew Berry
7401788dab update some opengl docs in display 2020-11-13 00:03:28 -08:00
Matthew Berry
e7849616ab mode 0 hfip / vflip, 100% done with tonc brin_demo 2020-11-12 00:09:48 -08:00
Matthew Berry
7086673a78 properly get screen entity index when size isn't 32x32 2020-11-11 00:00:23 -08:00
Matthew Berry
b6ddfcf424 move from sdl textures to opengl, add byuu color correction shaders :D 2020-11-10 00:00:06 -08:00
Matthew Berry
717965c400 sraw read/write, abort on unmapped access rather than raise 2020-11-09 23:08:14 -08:00
Matthew Berry
fdbfe805bd writes to bgofs regs 2020-11-08 22:34:57 -08:00
Matthew Berry
a5b0add637 mode 0 start: rendering 32x32 bg0 2020-11-08 01:45:28 -08:00
Matthew Berry
502df9b634 cartridge oob data, wait states 1/2 2020-11-07 19:40:29 -08:00
Matthew Berry
8e21578553 scanline rendering modes 3-5 2020-11-07 00:20:33 -08:00
Matthew Berry
86d21e5f43 ppu mode 5 because why not 2020-11-06 00:39:11 -08:00
Matthew Berry
b94ea60e6f psr transfer logic improvement, fix spsr load, remove default regs 2020-11-05 22:26:53 -08:00
Matthew Berry
8ec8645ca2 thumb laod address fix word bits selection 2020-11-04 22:32:37 -08:00
Matthew Berry
59769a222c thumb software interrupt fix link register offset 2020-11-03 00:04:15 -08:00
Matthew Berry
ba6fde31b1 arm block data transfer tune up, PASSING ARMWRESTLER 2020-11-02 00:14:15 -08:00
Matthew Berry
9464ad51c2 halfword transfer writeback fix 2020-11-01 15:38:12 -08:00
Matthew Berry
672917bb24 arm multiply long use correct bits for rs 2020-11-01 15:37:50 -08:00
Matthew Berry
184e7853da data processing pc 12 bytes ahead if register shift 2020-11-01 13:09:17 -08:00
Matthew Berry
ec08f0ee21 thumb stm correct direction, handle empty list case 2020-10-31 16:50:53 -07:00
Matthew Berry
9ad6086baf thumb imm offset only 5 bits in byte mode 2020-10-31 10:20:50 -07:00
Matthew Berry
91728019d9 abstract signed halfword reads, impl signed halfword misaligned reads 2020-10-31 00:23:51 -07:00
Matthew Berry
7121a9f187 implement proper memory alignments, arm single data transfer fix write-back cond 
http://problemkaputt.de/gbatek.htm#armcpumemoryalignments
 2020-10-30 23:56:47 -07:00
Matthew Berry
c8e84d8bed thumb load address bit 1 of pc should always be 0 2020-10-30 00:30:13 -07:00
Matthew Berry
adeb05911b thumb high reg bx ops only set flags on cmp 2020-10-29 00:10:20 -07:00
Matthew Berry
fa5746cc0b update bitfield version to get field locking support 2020-10-28 00:01:04 -07:00
Matthew Berry
4cc36e2bf6 data procesing move spsr to cpsr if rd == r15 2020-10-26 00:03:20 -07:00
Matthew Berry
723f3a6661 special rrx case 2020-10-25 18:01:00 -07:00
Matthew Berry
8538a0445a properly handle rotating registers by an immediate, asr0=asr32 2020-10-25 14:07:00 -07:00
Matthew Berry
bfc53e0222 handle difference between lsr immediates/registers, pass imm flag to all shifts 2020-10-25 00:48:45 -07:00
Matthew Berry
5749cd3a24 abstract register writing (always align and clear pipeline on pc writes) 2020-10-24 16:00:12 -07:00
Matthew Berry
2188e81c5b add oam, pram read mirroring 2020-10-24 13:41:23 -07:00
Matthew Berry
5a298dd41c fix sbc carry flag 2020-10-24 11:33:04 -07:00
Matthew Berry
c589e8f6ef fix thumb long branch link weird sign logic 2020-10-24 01:22:03 -07:00
Matthew Berry
a5ebfd603c fix thumb high reg branch exchange: don't write on cmp 2020-10-23 23:29:05 -07:00
Matthew Berry
bef0d366b6 don't bank cpsr, fix cpsr->spsr copy, make mode enum return u32 2020-10-23 23:27:34 -07:00
Matthew Berry
1f9fad7777 set conditions flag on shift imm 2020-10-23 23:25:18 -07:00
Matthew Berry
94a063adc3 clear pipeline in block data transfer when writing to pc 2020-10-23 00:03:24 -07:00
Matthew Berry
476bb6afd4 only print to console if rendering in unsupported bg mode 2020-10-22 23:53:30 -07:00
Matthew Berry
7b34b5696b add spsr, fix psr transfer (switch mode), set sp on boot, default ppu mode 3 2020-10-22 23:05:49 -07:00
Matthew Berry
2a43b20797 bump bitfield version, add post_init to force all components to init at start 2020-10-21 22:19:32 -07:00
Matthew Berry
da624104fd support adding bios (necessary for interrupts) 2020-10-20 08:25:26 -07:00
Matthew Berry
b401524ea5 arm / thumb software interrupts, register banking 2020-10-19 00:00:05 -07:00
Matthew Berry
49f6d39e84 ror edge-case if bits&31==0 2020-10-18 17:13:51 -07:00
Matthew Berry
71d714fcab adc properly handle case when op2=0xFFFFFFFF and carry is set 2020-10-18 12:33:22 -07:00
Matthew Berry
2ea0eda602 asr handle case where shift > 31 2020-10-18 12:15:46 -07:00
Matthew Berry
860fc64b11 ror &= 31 2020-10-18 11:53:30 -07:00