fix fake pipeline: actually read words in arm pipeline, read correct regs

This commit is contained in:
Matthew Berry 2021-02-12 00:42:38 -08:00
parent b4af85523e
commit f03c90a13b

View file

@ -95,12 +95,12 @@ class CPU
def fill_pipeline : Nil
if @cpsr.thumb
pc = @r[15] & ~1
@pipeline.push @gba.bus.read_half(@r[15] &- 2).to_u32!
@pipeline.push @gba.bus.read_half(@r[15]).to_u32!
@pipeline.push @gba.bus.read_half(@r[15] &- 2).to_u32! if @pipeline.size == 0
@pipeline.push @gba.bus.read_half(@r[15]).to_u32! if @pipeline.size == 1
else
pc = @r[15] & ~3
@pipeline.push @gba.bus.read_half(@r[15] &- 4).to_u32!
@pipeline.push @gba.bus.read_half(@r[15]).to_u32!
@pipeline.push @gba.bus.read_word(@r[15] &- 4) if @pipeline.size == 0
@pipeline.push @gba.bus.read_word(@r[15]) if @pipeline.size == 1
end
end