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move cpsr onto new bitfield implementation
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parent
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commit
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6 changed files with 41 additions and 21 deletions
1
.gitignore
vendored
1
.gitignore
vendored
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@ -3,3 +3,4 @@
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/bin/
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/.shards/
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*.dwarf
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/shard.lock
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@ -10,4 +10,9 @@ targets:
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crystal: 0.35.1
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dependencies:
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bitfield:
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github: mattrberry/bitfield
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version: 0.1.0
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license: MIT
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@ -1,3 +1,5 @@
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require "bitfield"
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require "./crab/gba"
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module Crab
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@ -19,21 +19,21 @@ module ARM
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private def check_cond(cond : Word) : Bool
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case bits cond, 28..31
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when 0x0 then bit?(@cpsr, 30) # Z
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when 0x1 then !bit?(@cpsr, 30) # !Z
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when 0x2 then bit?(@cpsr, 29) # C
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when 0x3 then !bit?(@cpsr, 29) # !C
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when 0x4 then bit?(@cpsr, 31) # N
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when 0x5 then !bit?(@cpsr, 31) # !N
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when 0x6 then bit?(@cpsr, 28) # V
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when 0x7 then !bit?(@cpsr, 28) # !V
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when 0x8 then bit?(@cpsr, 29) && !bit?(@cpsr, 30) # C && !Z
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when 0x9 then !bit?(@cpsr, 29) || bit?(@cpsr, 30) # !C || Z
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when 0xA then bit?(@cpsr, 31) == bit?(@cpsr, 28) # N == V
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when 0xB then bit?(@cpsr, 31) != bit?(@cpsr, 28) # N != V
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when 0xC then !bit?(@cpsr, 30) && bit?(@cpsr, 31) == bit?(@cpsr, 28) # !Z && N == V
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when 0xD then bit?(@cpsr, 30) || bit?(@cpsr, 31) != bit?(@cpsr, 28) # Z || N != V
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when 0xE then true # always
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when 0x0 then @cpsr.zero
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when 0x1 then !@cpsr.zero
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when 0x2 then @cpsr.carry
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when 0x3 then !@cpsr.carry
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when 0x4 then @cpsr.negative
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when 0x5 then !@cpsr.negative
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when 0x6 then @cpsr.overflow
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when 0x7 then !@cpsr.overflow
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when 0x8 then @cpsr.carry && !@cpsr.zero
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when 0x9 then !@cpsr.carry || @cpsr.zero
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when 0xA then @cpsr.negative == @cpsr.overflow
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when 0xB then @cpsr.negative != @cpsr.overflow
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when 0xC then !@cpsr.zero && @cpsr.negative == @cpsr.overflow
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when 0xD then @cpsr.zero || @cpsr.negative != @cpsr.overflow
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when 0xE then true
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else raise "Cond 0xF is reserved"
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end
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end
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@ -19,9 +19,9 @@ module ARM
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when 0x2 then @r[rd] = rn &- operand_2
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when 0x3 then @r[rd] = operand_2 &- rn
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when 0x4 then @r[rd] = rn &+ operand_2
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when 0x5 then @r[rd] = rn &+ operand_2 &+ (bit?(@cpsr, 29) ? 1 : 0)
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when 0x6 then @r[rd] = rn &- operand_2 &+ (bit?(@cpsr, 29) ? 1 : 0) &- 1
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when 0x7 then @r[rd] = operand_2 &- rn &+ (bit?(@cpsr, 29) ? 1 : 0) &- 1
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when 0x5 then @r[rd] = rn &+ operand_2 &+ @cpsr.carry.to_unsafe
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when 0x6 then @r[rd] = rn &- operand_2 &+ @cpsr.carry.to_unsafe &- 1
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when 0x7 then @r[rd] = operand_2 &- rn &+ @cpsr.carry.to_unsafe &- 1
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when 0x8
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when 0x9
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when 0xA
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@ -3,8 +3,20 @@ require "./arm/*"
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class CPU
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include ARM
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class PSR < BitField(UInt32)
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bool negative
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bool zero
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bool carry
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bool overflow
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num reserved, 20
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bool irq_disable
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bool fiq_disable
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bool thumb
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num mode, 5
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end
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@r = Slice(Word).new 16
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@cpsr : UInt32 = 0
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@cpsr : PSR
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@pipeline = Deque(Word).new 2
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getter lut : Slice(Proc(Word, Nil)) { fill_lut }
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@ -13,7 +25,7 @@ class CPU
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@r[1] = 0x000000EA
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@r[13] = 0x03007F00
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@r[15] = 0x08000000
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@cpsr = 0x6000001F
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@cpsr = PSR.new 0x6000001F
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end
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def fill_pipeline : Nil
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@ -40,6 +52,6 @@ class CPU
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@r.each do |reg|
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trace "#{hex_str reg, prefix: false} ", newline: false
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end
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trace "cpsr: #{hex_str @cpsr, prefix: false} | #{hex_str instr, prefix: false}"
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trace "cpsr: #{hex_str @cpsr.value, prefix: false} | #{hex_str instr, prefix: false}"
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end
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end
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