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simplify register rotates a little bit
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1 changed files with 4 additions and 5 deletions
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@ -72,14 +72,13 @@ module ARM
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def rotate_register(instr : Word, carry_out : Pointer(Bool), allow_register_shifts : Bool) : Word
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reg = bits(instr, 0..3)
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shift_type = bits(instr, 5..6)
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if allow_register_shifts && bit?(instr, 4)
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immediate = !(allow_register_shifts && bit?(instr, 4))
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if immediate
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shift_amount = bits(instr, 7..11)
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else
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shift_register = bits(instr, 8..11)
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# todo weird logic if bottom byte of reg > 31
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shift_amount = @r[shift_register] & 0xFF
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immediate = false
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else
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shift_amount = bits(instr, 7..11)
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immediate = true
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end
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case shift_type
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when 0b00 then lsl(@r[reg], shift_amount, carry_out)
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