mirror of
https://github.com/mattrberry/crab.git
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move instr lookup to lookup table, move instrs into module across files
This commit is contained in:
Matthew Berry
parent
ea5322b0fa
commit
b026160553
5 changed files with 181 additions and 173 deletions
128
src/crab/arm/arm.cr
Normal file
128
src/crab/arm/arm.cr
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@ -0,0 +1,128 @@
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# The `private defs` here are effectively meaningless since I only run ARM
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# functions from the CPU where I include it, but I'm just using it as an
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# indicator that the functions should not be called directly outside of the
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# module.
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module ARM
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def arm_execute(instr : Word) : Nil
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if check_cond instr
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hash = hash_instr instr
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lut[hash].call instr
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else
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log "Skipping instruction, cond: #{hex_str instr >> 28}"
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end
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end
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private def hash_instr(instr : Word) : Word
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(instr >> 16 & 0x0FF0) | (instr >> 4 & 0xF)
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end
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private def check_cond(cond : Word) : Bool
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case bits cond, 28..31
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when 0x0 then bit?(@cpsr, 30) # Z
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when 0x1 then !bit?(@cpsr, 30) # !Z
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when 0x2 then bit?(@cpsr, 29) # C
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when 0x3 then !bit?(@cpsr, 29) # !C
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when 0x4 then bit?(@cpsr, 31) # N
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when 0x5 then !bit?(@cpsr, 31) # !N
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when 0x6 then bit?(@cpsr, 28) # V
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when 0x7 then !bit?(@cpsr, 28) # !V
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when 0x8 then bit?(@cpsr, 29) && !bit?(@cpsr, 30) # C && !Z
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when 0x9 then !bit?(@cpsr, 29) || bit?(@cpsr, 30) # !C || Z
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when 0xA then bit?(@cpsr, 31) == bit?(@cpsr, 28) # N == V
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when 0xB then bit?(@cpsr, 31) != bit?(@cpsr, 28) # N != V
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when 0xC then !bit?(@cpsr, 30) && bit?(@cpsr, 31) == bit?(@cpsr, 28) # !Z && N == V
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when 0xD then bit?(@cpsr, 30) || bit?(@cpsr, 31) != bit?(@cpsr, 28) # Z || N != V
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when 0xE then true # always
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else raise "Cond 0xF is reserved"
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end
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end
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def fill_lut : Slice(Proc(Word, Nil))
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lut = Slice(Proc(Word, Nil)).new 4096, ->arm_unimplemented(Word)
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4096.times do |idx|
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if idx & 0b111100000000 == 0b111100000000
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# software interrupt
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elsif idx & 0b111100000001 == 0b111000000001
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# coprocessor register transfer
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elsif idx & 0b111100000001 == 0b111000000001
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# coprocessor data operation
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elsif idx & 0b111000000000 == 0b110000000000
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# coprocessor data transfer
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elsif idx & 0b111000000000 == 0b101000000000
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lut[idx] = ->arm_branch(Word)
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elsif idx & 0b111000000000 == 0b100000000000
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# block data transfer
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elsif idx & 0b111000000001 == 0b011000000001
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# undefined
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elsif idx & 0b110000000000 == 0b010000000000
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# single data transfer
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elsif idx & 0b111001001001 == 0b000001001001
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# halfword data transfer immediate offset
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elsif idx & 0b111001001001 == 0b000000001001
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# halfword data transfer register offset
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elsif idx & 0b111111111111 == 0b000100100001
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# branch exchange
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elsif idx & 0b111110111111 == 0b000100001001
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# single data swap
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elsif idx & 0b111110001111 == 0b000010001001
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# multiply long
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elsif idx & 0b111111001111 == 0b000000001001
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# multiply
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elsif idx & 0b110000000000 == 0b000000000000
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lut[idx] = ->arm_data_processing(Word)
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else
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lut[idx] = ->arm_unimplemented(Word)
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end
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end
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lut
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end
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def arm_unimplemented(instr : Word) : Nil
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puts "Unimplemented instruction: #{hex_str instr}"
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exit 1
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end
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def arm_unused(instr : Word) : Nil
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puts "Unused instruction: #{hex_str instr}"
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end
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# Logical shift left
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def lsl(word : Word, bits : Int) : Word
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word << bits
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end
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# Logical shift right
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def lsr(word : Word, bits : Int) : Word
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word >> bits
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end
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# Arithmetic shift right
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def asr(word : Word, bits : Int) : Word
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word // (2 ** bits)
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end
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# Rotate right
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def ror(word : Word, bits : Int) : Word
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word >> bits | word << (32 - bits)
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end
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def rotate_register(instr : Word) : Word
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shift = bits(instr, 4..11)
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reg = bits(instr, 0..3)
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shift_type = bits(instr, 5..6)
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shift_amount = if bit?(instr, 4)
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shift_register = bits(instr, 8..11)
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@r[shift_register] & 0xF
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else
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bits(instr, 7..11)
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end
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case shift_type
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when 0b00 then lsl(reg, shift_amount)
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when 0b01 then lsr(reg, shift_amount)
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when 0b10 then asr(reg, shift_amount)
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when 0b11 then ror(reg, shift_amount)
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else raise "Impossible shift type: #{hex_str shift_type}"
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end
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end
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end
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11
src/crab/arm/branch.cr
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11
src/crab/arm/branch.cr
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@ -0,0 +1,11 @@
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module ARM
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def arm_branch(instr : Word) : Nil
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link = bit?(instr, 24)
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offset = instr & 0xFFFFFF
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offset = (~offset &+ 1).to_i32 if bit?(offset, 23) # negative
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offset <<= 2
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@r[14] = @r[15] - 4 if link
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@r[15] &+= offset
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clear_pipeline
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end
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end
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36
src/crab/arm/data_processing.cr
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36
src/crab/arm/data_processing.cr
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@ -0,0 +1,36 @@
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module ARM
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def arm_data_processing(instr : Word) : Nil
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# todo all resulting flags
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imm_flag = bit?(instr, 25)
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opcode = bits(instr, 21..24)
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set_conditions = bit?(instr, 20)
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rn = bits(instr, 16..19)
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rd = bits(instr, 12..15)
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operand_2 = if imm_flag # Operand 2 is an immediate
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rotate = bits(instr, 8..11)
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imm = bits(instr, 0..7)
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ror(imm, 2 * rotate)
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else # Operand 2 is a register
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rotate_register bits(instr, 0..11)
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end
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case opcode
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when 0x0 then @r[rd] = rn & operand_2
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when 0x1 then @r[rd] = rn ^ operand_2
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when 0x2 then @r[rd] = rn &- operand_2
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when 0x3 then @r[rd] = operand_2 &- rn
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when 0x4 then @r[rd] = rn &+ operand_2
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when 0x5 then @r[rd] = rn &+ operand_2 &+ (bit?(@cpsr, 29) ? 1 : 0)
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when 0x6 then @r[rd] = rn &- operand_2 &+ (bit?(@cpsr, 29) ? 1 : 0) &- 1
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when 0x7 then @r[rd] = operand_2 &- rn &+ (bit?(@cpsr, 29) ? 1 : 0) &- 1
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when 0x8
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when 0x9
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when 0xA
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when 0xB
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when 0xC then @r[rd] = rn | operand_2
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when 0xD then @r[rd] = operand_2
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when 0xE then @r[rd] = rn & ~operand_2
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when 0xF then @r[rd] = ~operand_2
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else raise "Unimplemented execution of data processing opcode: #{hex_str opcode}"
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end
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end
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end
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125
src/crab/cpu.cr
125
src/crab/cpu.cr
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@ -1,7 +1,12 @@
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require "./arm/*"
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class CPU
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include ARM
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@r = Slice(Word).new 16
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@cpsr : UInt32 = 0
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@pipeline = Deque(Word).new 2
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getter lut : Slice(Proc(Word, Nil)) { fill_lut }
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def initialize(@gba : GBA)
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@r[0] = 0x08000000
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@ -24,129 +29,11 @@ class CPU
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@pipeline.clear
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end
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def check_cond(cond : Int) : Bool
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case cond & 0xF
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when 0x0 then bit?(@cpsr, 30) # Z
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when 0x1 then !bit?(@cpsr, 30) # !Z
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when 0x2 then bit?(@cpsr, 29) # C
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when 0x3 then !bit?(@cpsr, 29) # !C
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when 0x4 then bit?(@cpsr, 31) # N
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when 0x5 then !bit?(@cpsr, 31) # !N
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when 0x6 then bit?(@cpsr, 28) # V
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when 0x7 then !bit?(@cpsr, 28) # !V
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when 0x8 then bit?(@cpsr, 29) && !bit?(@cpsr, 30) # C && !Z
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when 0x9 then !bit?(@cpsr, 29) || bit?(@cpsr, 30) # !C || Z
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when 0xA then bit?(@cpsr, 31) == bit?(@cpsr, 28) # N == V
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when 0xB then bit?(@cpsr, 31) != bit?(@cpsr, 28) # N != V
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when 0xC then !bit?(@cpsr, 30) && bit?(@cpsr, 31) == bit?(@cpsr, 28) # !Z && N == V
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when 0xD then bit?(@cpsr, 30) || bit?(@cpsr, 31) != bit?(@cpsr, 28) # Z || N != V
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when 0xE then true # always
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else raise "Cond 0xF is reserved"
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end
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end
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def tick : Nil
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fill_pipeline
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instr = @pipeline.shift
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print_state instr
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execute instr
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end
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# Logical shift left
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def lsl(word : Word, bits : Int) : Word
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word << bits
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end
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# Logical shift right
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def lsr(word : Word, bits : Int) : Word
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word >> bits
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end
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# Arithmetic shift right
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def asr(word : Word, bits : Int) : Word
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word // (2 ** bits)
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end
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# Rotate right
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def ror(word : Word, bits : Int) : Word
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word >> bits | word << (32 - bits)
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end
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def rotate_register(instr : Word) : Word
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shift = bits(instr, 4..11)
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reg = bits(instr, 0..3)
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shift_type = bits(instr, 5..6)
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shift_amount = if bit?(instr, 4)
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shift_register = bits(instr, 8..11)
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@r[shift_register] & 0xF
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else
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bits(instr, 7..11)
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end
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case shift_type
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when 0b00 then lsl(reg, shift_amount)
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when 0b01 then lsr(reg, shift_amount)
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when 0b10 then asr(reg, shift_amount)
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when 0b11 then ror(reg, shift_amount)
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else raise "Impossible shift type: #{hex_str shift_type}"
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end
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end
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def hash_instr(instr : Word) : Word
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((instr >> 16) & 0x0FF0) | ((instr >> 4) & 0xF)
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end
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def execute(instr : Word) : Nil
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if check_cond instr >> 28
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hash = hash_instr instr
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instr_type = Instr.from_hash hash
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log "Execute #{hex_str instr}: #{instr_type}"
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case instr_type
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when Instr::BRANCH
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link = bit?(instr, 24)
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offset = instr & 0xFFFFFF
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offset = (~offset &+ 1).to_i32 if bit?(offset, 23) # negative
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offset <<= 2
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@r[14] = @r[15] - 4 if link
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@r[15] &+= offset
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clear_pipeline
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when Instr::DATA_PROCESSING_PSR_TRANSFER
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# todo all resulting flags
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imm_flag = bit?(instr, 25)
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opcode = bits(instr, 21..24)
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set_conditions = bit?(instr, 20)
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rn = bits(instr, 16..19)
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rd = bits(instr, 12..15)
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operand_2 = if imm_flag # Operand 2 is an immediate
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rotate = bits(instr, 8..11)
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imm = bits(instr, 0..7)
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ror(imm, 2 * rotate)
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else # Operand 2 is a register
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rotate_register bits(instr, 0..11)
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end
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case opcode
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when 0x0 then @r[rd] = rn & operand_2
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when 0x1 then @r[rd] = rn ^ operand_2
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when 0x2 then @r[rd] = rn &- operand_2
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when 0x3 then @r[rd] = operand_2 &- rn
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when 0x4 then @r[rd] = rn &+ operand_2
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when 0x5 then @r[rd] = rn &+ operand_2 &+ (bit?(@cpsr, 29) ? 1 : 0)
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when 0x6 then @r[rd] = rn &- operand_2 &+ (bit?(@cpsr, 29) ? 1 : 0) &- 1
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when 0x7 then @r[rd] = operand_2 &- rn &+ (bit?(@cpsr, 29) ? 1 : 0) &- 1
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when 0x8
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when 0x9
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when 0xA
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when 0xB
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when 0xC then @r[rd] = rn | operand_2
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when 0xD then @r[rd] = operand_2
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when 0xE then @r[rd] = rn & ~operand_2
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when 0xF then @r[rd] = ~operand_2
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else raise "Unimplemented execution of data processing opcode: #{hex_str opcode}"
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end
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else raise "Unimplemented execution of type: #{instr_type}"
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end
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else
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puts "Skipping instruction, cond: #{hex_str instr >> 28}"
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end
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arm_execute instr
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end
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def print_state(instr : Word) : Nil
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@ -1,57 +1,3 @@
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alias Byte = UInt8
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alias Word = UInt32
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alias Words = Slice(UInt32)
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enum Instr
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DATA_PROCESSING_PSR_TRANSFER
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MULTIPLY
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MULTIPLY_LONG
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SINGLE_DATA_SWAP
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BRANCH_EXCHANGE
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HALFWORD_DATA_TRANSFER_REGISTER_OFFSET
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HALFWORD_DATA_TRANSFER_IMMEDIATE_OFFSET
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SINGLE_DATA_TRANSFER
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UNDEFINED
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BLOCK_DATA_TRANSFER
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BRANCH
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COPROCESSOR_DATA_TRANSFER
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COPROCESSOR_DATA_OPERATION
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COPROCESSOR_REGISTER_TRANSFER
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SOFTWARE_INTERRUPT
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def self.from_hash(hash : Word) : Instr
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if hash & 0b111100000000 == 0b111100000000
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SOFTWARE_INTERRUPT
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elsif hash & 0b111100000001 == 0b111000000001
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COPROCESSOR_REGISTER_TRANSFER
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elsif hash & 0b111100000001 == 0b111000000001
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COPROCESSOR_DATA_OPERATION
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elsif hash & 0b111000000000 == 0b110000000000
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COPROCESSOR_DATA_TRANSFER
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elsif hash & 0b111000000000 == 0b101000000000
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BRANCH
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elsif hash & 0b111000000000 == 0b100000000000
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BLOCK_DATA_TRANSFER
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elsif hash & 0b111000000001 == 0b011000000001
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UNDEFINED
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elsif hash & 0b110000000000 == 0b010000000000
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SINGLE_DATA_TRANSFER
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elsif hash & 0b111001001001 == 0b000001001001
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HALFWORD_DATA_TRANSFER_IMMEDIATE_OFFSET
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elsif hash & 0b111001001001 == 0b000000001001
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HALFWORD_DATA_TRANSFER_REGISTER_OFFSET
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elsif hash & 0b111111111111 == 0b000100100001
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BRANCH_EXCHANGE
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elsif hash & 0b111110111111 == 0b000100001001
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SINGLE_DATA_SWAP
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elsif hash & 0b111110001111 == 0b000010001001
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MULTIPLY_LONG
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elsif hash & 0b111111001111 == 0b000000001001
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MULTIPLY
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elsif hash & 0b110000000000 == 0b000000000000
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DATA_PROCESSING_PSR_TRANSFER
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else
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raise "Unimplemented from_hash #{hex_str hash}"
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end
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end
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end
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