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implement direct writes in bus
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parent
832f05521f
commit
a5dd6ba394
1 changed files with 61 additions and 29 deletions
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@ -8,7 +8,6 @@ class Bus
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end
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def [](index : Int) : Byte
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log "read #{hex_str index.to_u32}"
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case bits(index, 24..27)
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when 0x0 then @bios[index & 0x3FFF]
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when 0x2 then @wram_board[index & 0x3FFFF]
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@ -28,11 +27,6 @@ class Bus
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end
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end
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def read_half_slow(index : Int) : HalfWord
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self[index].to_u16 |
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(self[index + 1].to_u16 << 8)
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end
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def read_half(index : Int) : HalfWord
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index &= ~1
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case bits(index, 24..27)
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@ -71,13 +65,6 @@ class Bus
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end
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end
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private def read_word_slow(index : Int) : Word
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self[index].to_u32 |
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(self[index + 1].to_u32 << 8) |
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(self[index + 2].to_u32 << 16) |
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(self[index + 3].to_u32 << 24)
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end
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def read_word(index : Int) : Word
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index &= ~3
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case bits(index, 24..27)
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@ -94,8 +81,8 @@ class Bus
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when 0x8, 0x9,
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0xA, 0xB,
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0xC, 0xD then (@gba.cartridge.rom.to_unsafe + (index & 0x01FFFFFF)).as(Word*).value
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when 0xE then read_word_slow(index)
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else abort "Unmapped read: #{hex_str index.to_u32}"
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when 0xE, 0xF then read_word_slow(index)
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else abort "Unmapped read: #{hex_str index.to_u32}"
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end
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end
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@ -106,11 +93,9 @@ class Bus
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end
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def []=(index : Int, value : Byte) : Nil
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log "write #{hex_str index.to_u32} -> #{hex_str value}"
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return if bits(index, 28..31) > 0
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@gba.cpu.fill_pipeline if index <= @gba.cpu.r[15] && index >= @gba.cpu.r[15] &- 4 # detect writes near pc
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case bits(index, 24..27)
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when 0x0 then log "Writing to bios - #{hex_str index.to_u32}: #{hex_str value}"
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when 0x2 then @wram_board[index & 0x3FFFF] = value
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when 0x3 then @wram_chip[index & 0x7FFF] = value
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when 0x4 then @gba.mmio[index] = value
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@ -119,24 +104,71 @@ class Bus
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address = 0x1FFFF_u32 & index
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address -= 0x8000 if address > 0x17FFF
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@gba.ppu.vram[address] = value
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when 0x7 then @gba.ppu.oam[index & 0x3FF] = value
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when 0x8, 0x9,
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0xA, 0xB,
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0xC, 0xD then log "Writing to cart - #{hex_str index.to_u32}: #{hex_str value}"
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when 0xE then @gba.storage[index] = value
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else abort "Unmapped write: #{hex_str index.to_u32}"
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when 0x7 then @gba.ppu.oam[index & 0x3FF] = value
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when 0xE, 0xF then @gba.storage[index] = value
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else log "Unmapped write: #{hex_str index.to_u32}"
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end
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end
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def []=(index : Int, value : HalfWord) : Nil
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self[index & ~1] = 0xFF_u8 & value
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self[(index & ~1) + 1] = 0xFF_u8 & (value >> 8)
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return if bits(index, 28..31) > 0
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index &= ~1
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@gba.cpu.fill_pipeline if index <= @gba.cpu.r[15] && index >= @gba.cpu.r[15] &- 4 # detect writes near pc
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case bits(index, 24..27)
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when 0x2 then (@wram_board.to_unsafe + (index & 0x3FFFF)).as(HalfWord*).value = value
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when 0x3 then (@wram_chip.to_unsafe + (index & 0x7FFF)).as(HalfWord*).value = value
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when 0x4 then write_half_slow(index, value)
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when 0x5 then (@gba.ppu.pram.to_unsafe + (index & 0x3FF)).as(HalfWord*).value = value
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when 0x6
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address = 0x1FFFF_u32 & index
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address -= 0x8000 if address > 0x17FFF
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(@gba.ppu.vram.to_unsafe + address).as(HalfWord*).value = value
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when 0x7 then (@gba.ppu.oam.to_unsafe + (index & 0x3FF)).as(HalfWord*).value = value
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when 0xE, 0xF then write_half_slow(index, value)
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else log "Unmapped write: #{hex_str index.to_u32}"
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end
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end
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def []=(index : Int, value : Word) : Nil
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self[index & ~3] = 0xFF_u8 & value
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self[(index & ~3) + 1] = 0xFF_u8 & (value >> 8)
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self[(index & ~3) + 2] = 0xFF_u8 & (value >> 16)
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self[(index & ~3) + 3] = 0xFF_u8 & (value >> 24)
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return if bits(index, 28..31) > 0
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index &= ~3
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@gba.cpu.fill_pipeline if index <= @gba.cpu.r[15] && index >= @gba.cpu.r[15] &- 4 # detect writes near pc
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case bits(index, 24..27)
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when 0x2 then (@wram_board.to_unsafe + (index & 0x3FFFF)).as(Word*).value = value
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when 0x3 then (@wram_chip.to_unsafe + (index & 0x7FFF)).as(Word*).value = value
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when 0x4 then write_word_slow(index, value)
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when 0x5 then (@gba.ppu.pram.to_unsafe + (index & 0x3FF)).as(Word*).value = value
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when 0x6
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address = 0x1FFFF_u32 & index
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address -= 0x8000 if address > 0x17FFF
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(@gba.ppu.vram.to_unsafe + address).as(Word*).value = value
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when 0x7 then (@gba.ppu.oam.to_unsafe + (index & 0x3FF)).as(Word*).value = value
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when 0xE, 0xF then write_word_slow(index, value)
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else log "Unmapped write: #{hex_str index.to_u32}"
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end
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end
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private def read_half_slow(index : Int) : HalfWord
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self[index].to_u16! |
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(self[index + 1].to_u16! << 8)
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end
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private def read_word_slow(index : Int) : Word
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self[index].to_u32! |
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(self[index + 1].to_u32! << 8) |
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(self[index + 2].to_u32! << 16) |
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(self[index + 3].to_u32! << 24)
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end
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private def write_half_slow(index : Int, value : HalfWord) : Nil
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self[index] = value.to_u8!
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self[index + 1] = (value >> 8).to_u8!
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end
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private def write_word_slow(index : Int, value : Word) : Nil
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self[index] = value.to_u8!
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self[index + 1] = (value >> 8).to_u8!
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self[index + 2] = (value >> 16).to_u8!
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self[index + 3] = (value >> 24).to_u8!
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end
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end
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