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thumb halfword data transfer immediate, pram read/write
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4 changed files with 53 additions and 0 deletions
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@ -38,6 +38,7 @@ module ARM
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lut[idx] = ->arm_single_data_transfer(Word)
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elsif idx & 0b111001001001 == 0b000001001001
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# halfword data transfer immediate offset
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lut[idx] = ->arm_halfword_data_transfer_immediate(Word)
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elsif idx & 0b111001001001 == 0b000000001001
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# halfword data transfer register offset
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elsif idx & 0b111111111111 == 0b000100100001
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49
src/crab/arm/halfword_data_transfer_imm.cr
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49
src/crab/arm/halfword_data_transfer_imm.cr
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@ -0,0 +1,49 @@
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module ARM
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def arm_halfword_data_transfer_immediate(instr : Word) : Nil
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pre_index = bit?(instr, 24)
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add = bit?(instr, 23)
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write_back = bit?(instr, 21)
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load = bit?(instr, 20)
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rn = bits(instr, 16..19)
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rd = bits(instr, 12..15)
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offset_high = bits(instr, 8..11)
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sh = bits(instr, 5..6)
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offset_low = bits(instr, 0..3)
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address = @r[rn]
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offset = offset_high << 4 | offset_low
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if pre_index
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if add
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address &+= offset
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else
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address &-= offset
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end
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end
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case sh
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when 0b00 # swp, no docs on this?
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when 0b01 # ldrh/strh
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if load
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@r[rd] = @gba.bus.read_half address
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else
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@gba.bus[address] = @r[rd]
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end
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when 0b10 # ldrsb
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@r[rd] = @gba.bus[address].to_i8!.to_u32
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when 0b11 # ldrsh
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@r[rd] = @gba.bus.read_half(address).to_i16!.to_u32
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else raise "Invalid halfword data transfer imm op: #{sh}"
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end
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if !pre_index
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if add
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@r[rn] &+= offset
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else
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@r[rn] &-= offset
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end
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elsif write_back
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@r[rn] = address
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end
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end
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end
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@ -17,6 +17,7 @@ class Bus
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else
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raise "Unmapped i/o read: #{hex_str index.to_u32}"
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end
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when 0x5 then @gba.ppu.pram[index]
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when 0x6
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address = 0x1FFFF_u32 & index
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address &= ~0x8000 if address > 0x17FFF
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@ -51,6 +52,7 @@ class Bus
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else
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raise "Unmapped i/o write: #{hex_str index.to_u32}"
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end
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when 0x5 then @gba.ppu.pram[index & 0x3FF] = value
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when 0x6
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address = 0x1FFFF_u32 & index
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address &= ~0x8000 if address > 0x17FFF
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@ -25,6 +25,7 @@ class PPU
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num bg_mode, 3 # (0-5=Video Mode 0-5, 6-7=Prohibited)
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end
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getter pram = Bytes.new 0x400
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getter vram = Bytes.new 0x18000
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@dispcnt : DISPCNT = DISPCNT.new 0
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