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fix multiple accumulate when destination is accumulate reg

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Matthew Berry 2021-01-31 00:16:09 -08:00
parent 24a186da3c
commit 6e71ee30b8
1 changed files with 1 additions and 2 deletions
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3
src/crab/arm/multiply.cr
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@ -7,8 +7,7 @@ module ARM
rs = bits(instr, 8..11)
rm = bits(instr, 0..3)
set_reg(rd, @r[rm] &* @r[rs])
set_reg(rd, @r[rd] &+ @r[rn]) if accumulate
set_reg(rd, @r[rm] &* @r[rs] &+ (accumulate ? @r[rn] : 0))
set_neg_and_zero_flags(@r[rd]) if set_conditions
end
end