From 0c7e952b8f41eae1af509edb11077f28cd2aa2a4 Mon Sep 17 00:00:00 2001 From: Matthew Berry Date: Sat, 8 Jan 2022 10:02:33 -0800 Subject: [PATCH] Standardize formatting again --- src/crab/gba/apu.cr | 2 -- src/crab/gba/apu/channel1.cr | 2 -- src/crab/gba/apu/channel2.cr | 2 -- src/crab/gba/apu/channel3.cr | 2 -- src/crab/gba/apu/channel4.cr | 2 -- src/crab/gba/thumb/multiple_load_store.cr | 2 +- src/crab/gba/types.cr | 2 +- 7 files changed, 2 insertions(+), 12 deletions(-) diff --git a/src/crab/gba/apu.cr b/src/crab/gba/apu.cr index 0ebaa26..4f51388 100644 --- a/src/crab/gba/apu.cr +++ b/src/crab/gba/apu.cr @@ -158,8 +158,6 @@ module GBA when 0x88 then @soundbias.value.to_u8! when 0x89 then (@soundbias.value >> 8).to_u8! else puts "Unmapped APU read ~ addr:#{hex_str io_addr.to_u8}".colorize.fore(:red); 0_u8 # todo: open bus - - end end diff --git a/src/crab/gba/apu/channel1.cr b/src/crab/gba/apu/channel1.cr index 7dc4caa..139aff6 100644 --- a/src/crab/gba/apu/channel1.cr +++ b/src/crab/gba/apu/channel1.cr @@ -85,8 +85,6 @@ module GBA when 0x64 then 0xFF_u8 # write-only when 0x65 then 0xBF_u8 | (@length_enable ? 0x40 : 0) else puts "Reading from invalid Channel1 register: #{hex_str index.to_u16}".colorize.fore(:red); 0_u8 # todo: open bus - - end end diff --git a/src/crab/gba/apu/channel2.cr b/src/crab/gba/apu/channel2.cr index 755c08d..280c059 100644 --- a/src/crab/gba/apu/channel2.cr +++ b/src/crab/gba/apu/channel2.cr @@ -50,8 +50,6 @@ module GBA when 0x6C then 0xFF_u8 # write-only when 0x6D then 0xBF_u8 | (@length_enable ? 0x40 : 0) else puts "Reading from invalid Channel2 register: #{hex_str index.to_u16}".colorize.fore(:red); 0_u8 # todo: open bus - - end end diff --git a/src/crab/gba/apu/channel3.cr b/src/crab/gba/apu/channel3.cr index 68a6e7e..6129b1e 100644 --- a/src/crab/gba/apu/channel3.cr +++ b/src/crab/gba/apu/channel3.cr @@ -63,8 +63,6 @@ module GBA @wave_ram[@wave_ram_bank][index - WAVE_RAM_RANGE.begin] end else puts "Reading from invalid Channel3 register: #{hex_str index.to_u16}".colorize.fore(:red); 0_u8 # todo: open bus - - end.to_u8 end diff --git a/src/crab/gba/apu/channel4.cr b/src/crab/gba/apu/channel4.cr index fd5ff5e..4d906c9 100644 --- a/src/crab/gba/apu/channel4.cr +++ b/src/crab/gba/apu/channel4.cr @@ -50,8 +50,6 @@ module GBA when 0x7C then @clock_shift << 4 | @width_mode << 3 | @divisor_code when 0x7D then 0xBF | (@length_enable ? 0x40 : 0) else puts "Reading from invalid Channel4 register: #{hex_str index.to_u16}".colorize.fore(:red); 0_u8 # todo: open bus - - end.to_u8 end diff --git a/src/crab/gba/thumb/multiple_load_store.cr b/src/crab/gba/thumb/multiple_load_store.cr index a8199a8..c56dc58 100644 --- a/src/crab/gba/thumb/multiple_load_store.cr +++ b/src/crab/gba/thumb/multiple_load_store.cr @@ -7,7 +7,7 @@ module GBA address = @r[rb] unless list == 0 final_addr = 4_u32 * list.popcount + address - if load # ldmia + if load # ldmia @r[rb] = final_addr # thumb ldmia writes back immediately 8.times do |idx| if bit?(list, idx) diff --git a/src/crab/gba/types.cr b/src/crab/gba/types.cr index 3985b23..98cdd6a 100644 --- a/src/crab/gba/types.cr +++ b/src/crab/gba/types.cr @@ -4,7 +4,7 @@ module GBA alias Word = UInt32 alias Words = Slice(UInt32) record BGR16, value : UInt16 do # xBBBBBGGGGGRRRRR - # Create a new BGR16 struct with the given values. Trucates at 5 bits. + # Create a new BGR16 struct with the given values. Trucates at 5 bits. def initialize(blue : Number, green : Number, red : Number) @value = (blue <= 0x1F ? blue.to_u16 : 0x1F_u16) << 10 | (green <= 0x1F ? green.to_u16 : 0x1F_u16) << 5 |