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early psr transfer implementation
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2 changed files with 28 additions and 0 deletions
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@ -69,6 +69,8 @@ module ARM
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# multiply long
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elsif idx & 0b111111001111 == 0b000000001001
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# multiply
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elsif idx & 0b110110010000 == 0b000100000000
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lut[idx] = ->arm_psr_transfer(Word)
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elsif idx & 0b110000000000 == 0b000000000000
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lut[idx] = ->arm_data_processing(Word)
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else
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26
src/crab/arm/psr_transfer.cr
Normal file
26
src/crab/arm/psr_transfer.cr
Normal file
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@ -0,0 +1,26 @@
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module ARM
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def arm_psr_transfer(instr : Word) : Nil
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# todo respect spsr
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spsr = bit?(instr, 22)
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msr = bit?(instr, 21)
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if msr
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all = bit?(instr, 16)
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if all
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rm = bits(instr, 0..3)
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@cpsr.value = @r[rm]
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else
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imm_flag = bit?(instr, 25)
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value = if imm_flag
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immediate_offset bits(instr, 0..11)
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else
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rm = bits(instr, 0..3)
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@r[rm]
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end
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@cpsr.value = (@cpsr.value & 0x0FFFFFFF) | (value & 0xF0000000)
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end
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else
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rd = bits(instr, 12..15)
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@r[rd] = @cpsr.value
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end
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end
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end
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