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b0beba2480
Signed-off-by: B. Watson <yalhcru@gmail.com> Signed-off-by: Willy Sudiarto Raharjo <willysr@slackbuilds.org>
7 lines
348 B
Text
7 lines
348 B
Text
ADMS is a code generator for the Verilog-AMS language
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ADMS is a code generator that converts electrical compact
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device models specified in high-level description language into
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ready-to-compile C code for the API of spice simulators. Based on
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transformations specified in XML language, ADMS transforms Verilog-AMS
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code into other target languages.
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